This addressing mode adds a 4-bit(9-bit or 24-bit) unsigned offset to the base index register to form the memory address that is referenced in the instruction. The valid range for a 4-bit unsigned offset is [0..15]. The base index register may be X, Y, SP, PC.
These indexed addressing modes use an index register as a base address and add a constant or register offset to form the effective address of the operand. The index register is usually X, Y, SP, or PC, but in a few modes a CPU data register Di can be used as the index base address. IDX implies zero extension bytes which means everything the instruction needs is included in the instruction or internal CPU registers itself.
IDX1, IDX2, and IDX3 imply 1, 2, or 3 additional extension bytes are needed, respectively.
The topics covers here are as follows: