Quad-LIN Leader Transceiver for In-Vehicle Subnetworks

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Product Details

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Block Diagram

TJA1124 Block Diagram

TJA1124 Block Diagram



  • Four LIN leader channels in a single package:
    • LIN transceiver.
    • LIN leader termination consisting of a diode and a pull-up resistor.
  • Very low current consumption in Low Power mode with wake-up via SLP or LIN pins.
  • Option to control an external voltage regulator via the INHN output.
  • Bus signal shaping optimized for baud rates up to 20 kBd.
  • VIO input for direct interfacing with 3.3 V and 5 V microcontrollers.
  • Passive behavior in an unpowered state.
  • Undervoltage detection.
  • K-line compatible.
  • Leadless DHVQFN24 package (3.5 mm × 5.5 mm) supporting improved Automated Optical Inspection (AOI) capability.


  • Excellent ElectroMagnetic Immunity (EMI).
  • Very high ESD robustness: ±6 kV according to IEC61000-4-2 for pins LIN1 to LIN4 and BAT.
  • Bus terminal and battery pin protected against transients in the automotive environment (ISO 7637).
  • Bus terminal short-circuit proof to battery and ground.
  • TXD dominant timeout function.
  • LIN dominant timeout function.
  • Thermal protection.


  • Compliant with:
    • LIN 2.0, LIN 2.1, LIN 2.2, LIN 2.2A.
    • ISO 17987-4:2016 (12 V LIN).
    • SAE J2602-1.

Product Longevity Program

  • TJA1124 is included in the Product Longevity Program for 15 years from product launch. Please visit the Product Longevity Page for more information.

Design Resources

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Quick reference to our documentation types.

2 documents


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