Universal LCD Driver for Low Multiplex Rates

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Block Diagram

PCF85133 Block Diagram

PCF85133 Block Diagram


  • Single-chip LCD controller and driver
  • Selectable backplane drive configuration: static or 2, 3, or 4 backplane multiplexing
  • Selectable display bias configuration: static, 1/2, or 1/3
  • Selectable frame frequency: 82 Hz or 110 Hz
  • Internal LCD bias generation with voltage-follower buffers
  • 80 segment drives:
    • Up to 40 7-segment numeric characters
    • Up to 20 14-segment alphanumeric characters
    • Any graphics of up to 320 elements
  • 80 × 4 bit RAM for display data storage
  • Auto-incremental display data loading across device subaddress boundaries
  • Display memory bank switching in static and duplex drive modes
  • Versatile blinking modes
  • Independent supplies possible for LCD and logic voltages
  • Wide power supply range: from 1.8 V to 5.5 V
  • Wide logic LCD supply range:
    • From 2.5 V for low-threshold LCDs
    • Up to 6.5 V for guest-host LCDs and high-threshold twisted nematic LCDs
  • Low power consumption
  • 400 kHz I²C-bus interface
  • May be cascaded for large LCD applications (up to 5120 elements possible)
  • May be cascaded with PCF8532 to gain more flexibility in the number of addressable segments
  • No external components required
  • Compatible with Chip-On-Glass (COG) technology
  • Manufactured using silicon gate CMOS process

Part numbers include: PCF85133U.


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