MCM69C233TQ15: 4K x 64 CAM ARCHIVED

Overview

The MCM69C233 is EOL. See PCN9049.
Possible replacement: none.

The MCM69C233 is a flexible content–addressable memory (CAM) that can contain 4096 entries of 64 bits each. The widths of the match field and the output field are programmable, and the match time is designed to be 210 ns. As a result, the MCM69C233 is well suited for datacom applications such as Virtual Path Identifier/Virtual Circuit Identifier (VPI/VCI) translation in ATM switches up to OC12 (622 Mbps) data rates and Media Access Control (MAC) address lookup in Ethernet/Fast Ethernet bridges. The match duty cycle of the MCM69C233 is user defined, with a trade–off between the time between matches and the rate of new entries added to the CAM.

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Features

66 MHz for PowerQUICC^® II applications
210 ns match time
4096 Entries
210 ns Match Time
Mask Register to “Don’t Care” Selected Bits
Depth Expansion by Cascading Multiple Devices
66 MHz Maximum Clock Rate
Programmable Match and Output Field Widths
Concurrent Matching of Virtual Path Circuits and Virtual Connection Circuits in ATM Mode
Separate Ports for Control and Match Operations
300 ns Insertion Time if 1 of 12 Entry Queue Locations is Empty
18 ms Initialization Time After Fast Insertion (at Power–Up Only)
Single 3.3 V ±5% Supply
IEEE Standard 1149.1 Test Port (JTAG)
100–Pin TQFP Package

MoreLess

Features

66 MHz for PowerQUICC^® II applications
210 ns match time
4096 Entries
210 ns Match Time
Mask Register to “Don’t Care” Selected Bits
Depth Expansion by Cascading Multiple Devices
66 MHz Maximum Clock Rate
Programmable Match and Output Field Widths
Concurrent Matching of Virtual Path Circuits and Virtual Connection Circuits in ATM Mode
Separate Ports for Control and Match Operations
300 ns Insertion Time if 1 of 12 Entry Queue Locations is Empty
18 ms Initialization Time After Fast Insertion (at Power–Up Only)
Single 3.3 V ±5% Supply
IEEE Standard 1149.1 Test Port (JTAG)
100–Pin TQFP Package

Data Sheets

Application Notes