4-Bit LVTTL-to-GTL Transceiver


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Product Details

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Block Diagram

GTL2014 Block Diagram

GTL2014 Block Diagram


Key Features

  • Operates as a 4-bit GTL-/GTL/GTL+ sampling receiver or as a LVTTL to GTL-/GTL/GTL+ driver
  • 3.0 V to 3.6 V operation with 5 V tolerant LVTTL input
  • GTL input and output 3.6 V tolerant
  • Vref adjustable from 0.5 V to VCC/2
  • Partial power-down permitted
  • ESD protection exceeds 2000 V HBM per JESD22-A114 and 1000 V CDM per JESD22-CC101
  • Latch-up protection exceeds 500 mA per JESD78
  • Package offered: TSSOP14

Product Longevity Program

  • This product is included in the NXP Product Longevity Program ensuring a stable supply of products for your embedded designs. The GTL2014PW is included in the 15-year program


Quick reference to our documentation types.

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Design Resources

Design Files

2 design files

  • Models

    GLT2014 IBIS model

  • Symbols and Footprints

    GTL2014PW-TSSOP14-CAD Symbol and PCB Footprint – BXL File


1 hardware offering

Engineering Services

2 engineering services

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