GTL2018PW: 8-Bit LVTTL-to-GTL Transceiver

The GTL2018 is an octal translating transceiver designed for 3.3 V LVTTL system interface with a GTL-/GTL/GTL+ bus.

The direction pin (DIR) allows the part to function as either a GTL-to-LVTTL sampling receiver or as an LVTTL-to-GTL interface.

The GTL2018 LVTTL inputs (only) are tolerant up to 5.5 V, allowing direct access to TTL or 5 V CMOS inputs.