Quad GTL/GTL+ to LVTTL/TTL Bidirectional Non-Latched Translator

  • Not Recommended for New Designs
  • This page contains information on a product that is not recommended for new designs.

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Block Diagram

Quad GTL/GTL+ to LVTTL/TTL Bidirectional Non-Latched Translator

GTL2005 Block Diagram


Key Features

  • Operates as a quad GTL/GTL+ sampling receiver or as a LVTTL/TTL to GTL/GTL+ driver
  • Quad bidirectional bus interface
  • 3.0 V to 3.6 V operation with 5 V tolerant LVTTL I/O
  • Live insertion/extraction permitted
  • Latch-up protection exceeds 500 mA per JESD78
  • ESD protection exceeds 2000 V HBM per JESD22-A114, 150 V MM per JESD22-A115 and 1000 V CDM per JESD22-CC101
  • Package offered: TSSOP14


Quick reference to our documentation types.

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Design Resources

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Design Files

2 design files

  • Models

    GLT2005 IBIS model

  • Symbols and Footprints

    GTL2005PW-TSSOP14-CAD Symbol and PCB Footprint – BXL File


1 hardware offering


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