ASIL B System Solution For BDC Motor

ASILBSYSTM

Product Details

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Block Diagram

ASIL B System Solution For BDC Motor

ASIL B System Solution For BDC Motor BD

Features

Scalable single platform

  • Single, multiple or lockstep Cortex-M7 cores, 120-240 MHz + FPU
  • 512 KB-8 MB Flash with ECC
  • FOTA – A/B firmware swap with zero downtime and roll-back support. Automatic address translation
  • 12-bit 1 Msps ADC, 16-bit eMIOS timer with logic control unit for motor control
  • Low-power run and standby modes, fast wake-up, clock and power gating
  • MaxQFP and BGA packages

Safety, security and connectivity

  • ISO 26262 up to ASIL B/D
  • Fault Collection and Control Unit
  • Hardware and software watchdogs, clock/power/temperature monitors
  • Safety documentation and SafeAssure community support
  • HSE security engine - AES-128/192/256, RSA, ECC, secure boot and key storage; side channel protection; ISO 21434 intended
  • Ethernet TSN/AVB (100 Mbps/1 Gbps), I3C, CAN FD, FlexIO (SPI/IIC/IIS/SENT protocol), serial audio interface, QSPI

Production-grade software

  • S32 Design Studio IDE – Eclipse, GCC and debugger, 3rd party support
  • Real-Time Drivers – free of charge (AUTOSAR and non-AUTOSAR), ASIL-D compliant
  • Security firmware – NXP provided, field upgradeable
  • S32 Safety Software Framework (SAF) and Structural Core Self-Test (SCST) library
  • Safety Peripheral Drivers
  • Model-Based Design Toolbox (MBDT) for MATLAB®

Support

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