Digital Signal Controller

56F824X_825X

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Block Diagram

Freescale 56F824X/825X Digital Signal Controller Block Diagram

NXP<sup>&#174;</sup> 56F824X/825X Digital Signal Controller Block Diagram

Features

  • 60 MHz operation frequency
  • On-chip memory
  • eFlexPWM with up to nine channels, including six channels with high-resolution NanoEdge placement
  • Two 8-channel, 12-bit ADCs with dynamic x2 and x4 programmable amplifier
  • Three analog comparators with integrated 5-bit digital-to-analog converter (DAC) references
  • Cyclic redundancy check (CRC) generator
  • Multiple communication interfaces such as QSPI, QSCI with LIN functionality, SMBus-compatible I²C and MSCAN 2.0 A/B module
  • Two 16-bit quad timers (2 x 4 16-bit timers)
  • On-chip relaxation oscillator: 8 MHz (400 kHz at standby mode)
  • Inter-module crossbar connection

Design Resources

Documentation

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