Arm Cortex-M4|Kinetis K11 50 MHz 32-bit MCUs

Overview

The Kinetis^® K11 50 MHz baseline MCUs, built on the Arm^® Cortex^®-M4 core, are optimized for cost-sensitive applications requiring low-power, security encryption, tamper detection and processing efficiency. This family shares the comprehensive enablement and scalability of the Kinetis portfolio.

Please contact your local NXP representative to download the K11 Security Data sheet and Reference Manual documents (under NDA).

Features

Low-Power

11 low-power modes with power and clock gating for optimal peripheral activity and recovery times. 4 µs wake-up from Stop mode
Full memory and analog operation down to 1.71 volts for extended battery life
Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes
Low-power timer for continual system operation in reduced power state

Flash, SRAM and FlexMemory

128 KB-512 KB flash. Fast access, high reliability with 4-level security protection
Up to 64 KB FlexRAM
FlexMemory
- Up to 4 KB of user-segmentable byte write/erase EEPROM for data tables/system data
- EEPROM with over 10M cycles and flash with 100 µsec write time (brownouts without data loss or corruption)
- No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts
- In addition, FlexNVM from 64 KB for extra program code, data or EEPROM backup

Performance

50 MHz Cortex-M4 core with DSP instruction set, single cycle MAC and single instruction multiple data (SIMD) extensions
Up to 16-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput0 MHz core
Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth

Timing and Control

Up to two FlexTimers with a total of 10 channels. Hardware dead-time insertion and quadrature decoding for motor control
Carrier modulator timer for infrared waveform generation in remote control applications
Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block

Connectivity and Communications

Up to three UARTs. One UART supports RS232 with flow control, RS485, ISO7816 and IrDA. All other two UARTS support RS232 with flow control and RS485
One inter-IC Sound (I²S) serial interface for audio system interfacing
One DSPI and one I²C

Reliability, Safety and Security

Hardware Encryption coprocessor for secure data transfer and storage
- Faster than software implementations and with minimal CPU loading
- Supports a wide variety of algorithms - DES, 3DES, AES, MD5, SHA-1, SHA-256
System security and tamper detect with secure real-time clock with independent battery supply. Secure key storage with internal/external tamper detect for unsecure flash, temperature, clock, and supply voltage variations and physical attack detection
Cyclic redundancy check engine validates memory contents and communication data, increasing system reliability
Independent-clocked COP guards against clock skew or code runaway for fail-safe applications such as the IEC 60730 safety standard for household appliances
External watchdog monitor drives output pin to safe state external components if watchdog event occurs