i.MX RT700 Crossover MCU with Arm® Cortex®-M33, NPU, DSP and GPU Cores

i.MX-RT700 Preproduction
  • This page contains information on a preproduction product. Specifications and information herein are subject to change without notice. For additional information contact support or your sales representative.

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The i.MX RT700 features up to five computing cores designed to power smart AI-enabled edge devices such as wearables, consumer medical, smart home and HMI devices. Its Compute Subsystem includes a primary Arm® Cortex®-M33 running at 325 MHz and Cadence® Tensilica® HiFi 4 DSP for more DSP and audio processing. An ultra-low power Sense Subsystem includes a second Arm Cortex-M33 and Cadence Tensilica HiFi 1 DSP. This removes the need for an external sensor hub reducing system design complexity, footprint and BOM costs. i.MX RT700 includes NXP's eIQ® Neutron NPU accelerating AI workloads by up to 172x and integrates up to 7.5 MB of onboard SRAM.

The i.MX RT700 is supported by the MCUXpresso Developer Experience, which includes an SDK, a choice of IDEs and secure provisioning and configuration tools to enable rapid development.

Block Diagram

i.MX RT700 Crossover MCU

i.MX RT700
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Features

Core Platform

  • Main Compute Subsystem
    • Arm Cortex-M33 up to 325 MHz
    • HiFi 4 DSP up to 325 MHz
    • eIQ Neutron NPU up to 325 MHz
  • Sense Compute Subsystem
    • Arm Cortex-M33 up to 250 MHz
    • HiFi 1 DSP up to 250 MHz

Memory

  • 7.5 MB on-chip SRAM
  • Three xSPI interfaces for off-chip memory expansion, supporting up to 16b wide external memories up to 250 MHz DDR

Peripherals

  • eUSB support with integrated PHY
  • Two SD/eMMC memory card interfaces—one supporting eMMC 5.0 with HS400/DDR operation
  • USB high-speed host/device controller with on-chip PHY
  • A digital microphone interface supporting up to 8 channels
  • Serial peripherals (UART/I²C/I3C/SPI/HSPI/SAI)

Graphics

  • 2.5D GPU with vector graphics acceleration and frame buffer compression
  • EZH-V using RISC-V core with additional SIMD/DSP instructions
  • Full openVG 1.1 support
  • Upto 720p@60FPS from on-chip SRAM
  • LCD Interface + MIPI DSI
  • Integrated JPEG and PNG support
  • CSI 8/10/16-bit parallel (via FlexIO)

Security

  • EdgeLock® Secure Enclave (Core Profile)
    • Secure boot and debug
    • Cryptographic services (TRNG, DICE, UID, PUF, OTP)
    • Crypto accelerators for PKC, AES, SHA, etc
    • Security monitoring with tamper and intrusion detection
    • Device Attestation with support of Device Identifier Composition Engine (DICE)
    • Life cycle management

MCUXpresso Developer Experience

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