Applications Processors - Integrated Image Processing Unit (IPU), Connectivity , Arm11 Core

Product Details

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Block Diagram

i.MX31 Multimedia Applications Processor Block Diagram

i.MX31 Multimedia Applications Processor Block Diagram

Features

CPU Complex

  • Arm1136JF-S
  • 128 KB L2 unified cache
  • Vector floating point coprocessor (VFP)

External Memory Interface (EMI)

  • SDRAM 16/32-bit, 133 MHz
  • Mobile DDR 16/32-bit, 266 MHz
  • NAND flash 8/16-bit
  • PSRAM

Multimedia

  • VGA MPEG®-4 HW encode
  • Graphics acceleration (i.MX31 only)
  • Image Processing Unit (IPU)
  • CMOS/CCD sensor interface
  • Resize, color space conversion
  • Deblocking, deringing, blending
  • Display/TV controller

Advanced Power Management

  • Automatic Dynamic Voltage and Frequency Scaling (DVFS)
  • Dynamic Process and Temperature Compensation (DPTC)
  • Active well-bias
  • Power gating

Product Longevity

Documentation

Quick reference to our documentation types.

1-5 of 45 documents

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Design Resources

Hardware

2 hardware offerings

Software

1 software file

Note: For better experience, software downloads are recommended on desktop.

Engineering Services

1-5 of 22 engineering services

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To find a complete list of our partners that support this product, please see our Partner Marketplace.

Training

3 trainings

Support

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