Layerscape LX2160A Multicore Communications Processor

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Layerscape Communication Processors Training Catalog

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Part 5| Configuring the Core, Understanding the Arm v8 exception level processing (EL0 through EL3) and the Generic Interrupt Controller v3 (GICv3) logic on the latest LS series processors

Part 8| Example Code, Understanding the ARM®v8 exception level processing (EL0 through EL3) and the Generic Interrupt Controller v3 (GICv3) logic on the latest QorIQ LS series processors

Part 1| Overview, Understanding the ARM®v8 exception level processing (EL0 through EL3) and the Generic Interrupt Controller v3 (GICv3) logic on the latest LS series processors


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