QorIQ® Layerscape 2084A and 2044A Multicore Communications Processors

Layerscape Communication Processors Training Catalog

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Part 5| Configuring the Core, Understanding the ARM®v8 exception level processing (EL0 through EL3) and the Generic Interrupt Controller v3 (GICv3) logic on the latest QorIQ LS series processors

Part 1| Introduction, This session will provide an overview of the QorIQ security accelerator block, its device driver, and its use in IPsec and SSL acceleration.

Introduction to QorIQ LS2 and LS1088 ProcessorsOverview of the QorIQ LS2 and LS1088 processors, including the interfaces supported by the LS family, considerations while designing with these devices and use case examples.


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