Layerscape® 1088A and 1048A Processor

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Block Diagram

LS1088A Block Diagram

LS1088A Processors Block Diagram

Features

Core Complex

  • 8x Cortex-A53 CPUs
    • Up to 1.6 GHz with 64-bit ISA support
    • Each two core clusters shares 1 MB L2 cache
  • 1x 64-bit DDR4 up to 2.1GT/s
    • ECC support

Networking Elements

  • Wire Rate I/O processor, featuring:
    • 2x 10 GbE + 8x 1 GbE
    • MACSEC on 4x 1G
    • XFI/KR, QSGMII, SGMII/KX, RGMII
  • Advanced IO processor (AIOP)
    • up to 10 Gb/s complex packet processing
  • 10 Gb/s SEC crypto acceleration

Interfaces

  • Supports x4, x2, 3x1 PCIe Gen 3 controllers
  • SR-IOV support, Root Complex
  • 1x SATA 3.0
  • 2x USB 3.0 with PHY
  • 2x TDM/HDLC interfaces

Additional Features

  • Support for HW virtualization and partitioning enforcement
  • Industry-standard APIs
  • Functional data path libraries
  • Tailored CodeWarrior® Development Suites

Original Design Manufacturers Partners

Design Resources

Documentation

Quick reference to our documentation types.

1-5 of 29 documents

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Hardware

3 hardware offerings

Software

4 software files

Note: For better experience, software downloads are recommended on desktop.

Engineering Services

1-5 of 12 engineering services

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To find a complete list of our partners that support this product, please see our Partner Marketplace.

Training

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