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MPC8315E: Low-Power PowerQUICC^® II Pro Processor with DDR2, TDM, PCI, PCI Express, SATA, 1 GB Ethernet, Security, USB

Recommended Documentation (4)

Name/Description	Type	Modified Date
MPC8315E Fact Sheet PDF Rev 3 232.2 KB MPC8315EFS English	Fact Sheet	Apr 1, 2009
MPC8315E Reference Manual PDF Rev 2 12.8 MB MPC8315ERM English	Reference Manual	Jun 29, 2010
MPC8315E Product Brief PDF Rev 0 519.8 KB MPC8315EPB English	Product Brief	Sep 14, 2007
MPC8315E PowerQUICC^® II Pro Processor Hardware Specifications PDF Rev 2 676.9 KB MPC8315EEC English	Data Sheet	Nov 23, 2011

Data Sheet (1)

Name/Description	Modified Date
MPC8315E PowerQUICC^® II Pro Processor Hardware Specifications PDF Rev 2 676.9 KB MPC8315EEC English	Nov 23, 2011

Reference Manual (2)

Errata to MPC8315E PowerQUICC^®™ II Pro Integrated Host Processor Family Reference Manual, Rev. 1
PDF
Rev 2.1
509.1 KB
MPC8315ERMAD
English

Sep 20, 2010

MPC8315E Reference Manual
PDF
Rev 2
12.8 MB
MPC8315ERM
English

Jun 29, 2010

Application Note (13)

Name/Description	Modified Date
Accommodating Layer 2 Padding (Shimming) with the Enhanced Three-Speed Ethernet Controller (eTSEC) PDF Rev 1 497.2 KB AN3537 English	Dec 6, 2007
PowerQUICC™ HDLC Support and Example Code PDF Rev 0 496.6 KB AN3966 English	Nov 10, 2009
SerDes Reference Clock Interfacing and HSSI Measurements Recommendations PDF Rev Rev. 0 577.2 KB AN4311 English	May 13, 2011
AN3830, Hardware Debugging Using the CodeWarrior^® ™ IDE - Application Notes PDF Rev 0 1.6 MB AN3830 English	Feb 1, 2011
PowerQUICC™ Data Cache Coherency PDF Rev 0 547.7 KB AN3544 English	Dec 21, 2007
Enabling and Checking DDR ECC on PowerQUICC^® II PDF Rev 0 460.6 KB AN3538 English Associated File: AN3538SW	Dec 10, 2007
AN2583, Programming the PowerQUICC^® III/PowerQUICC II Pro DDR SDRAM Controller - Application Note PDF Rev 11 333.2 KB AN2583 English	Jul 29, 2014
SEC 2/3x Descriptor Programmer’s Guide PDF Rev 3 1.1 MB AN3645 English	Apr 28, 2017
Design Checklist for PowerQUICC^®™ II Pro MPC8315E Processor PDF Rev 1 325.4 KB AN3438 English	Feb 16, 2012
Hardware and Layout Design Considerations for DDR2 SDRAM Memory Interfaces PDF Rev 2 619.7 KB AN2910 English	Mar 27, 2007
DDR Interleaving for PowerQUICC and QorIQ Processors PDF Rev 1 717.3 KB AN3939 English	Jun 30, 2010
Communicating via HDLC over a TDM Interface with a QUICC Engine™ UCC PDF Rev 0 718.0 KB AN4026 English Associated File: AN4026SW	Dec 17, 2009
Programming the User-Programmable Machine (UPM) for SDRAM Memory Devices PDF Rev 0 574.8 KB AN3533 English	Nov 8, 2007

Application Note Software (2)

Software Package for Enabling and Checking DDR ECC on PowerQUICC^®™ II Pro
ZIP
Rev 0
193.9 KB
AN3538SW
English

Dec 10, 2007

Software to accompany application note AN3966
ZIP
Rev 0
330.9 KB
AN3966SW
English

Nov 10, 2009

Brochure (1)

MPC831x
PDF
Rev 1
828.2 KB
MPC831X_BROCHURE
English

Apr 16, 2008

Errata (1)

MPC8315E Chip Errata - Chip Errata
PDF
Rev 4
632.3 KB
MPC8315ECE
English

May 27, 2014

Fact Sheet (3)

PowerQUICC Integrates IEEE 1588 Time Synchronization
PDF
Rev 4
216.3 KB
PQIEEE1588FS
English

Feb 14, 2008

MPC8315E-RDB Reference Platform Fact Sheet
PDF
Rev 2
585.1 KB
MPC8315ERDBFS
English

Apr 6, 2009

MPC8315E Fact Sheet
PDF
Rev 3
232.2 KB
MPC8315EFS
English

Apr 1, 2009

Product Brief (1)

MPC8315E Product Brief
PDF
Rev 0
519.8 KB
MPC8315EPB
English

Sep 14, 2007

Supporting Information (1)

MPC8315E Family Customer Export Control Information
PDF
Rev 2
236.6 KB
MPC8315EFAMPECI
English

Dec 10, 2010

White Paper (2)

Understanding Cryptographic Performance
PDF
Rev 3
580.1 KB
CRYPTOWP
English

Aug 15, 2008

Comparison of DDRx and SDRAM
PDF
Rev 0
735.3 KB
DDRSDRAMWP
English

Apr 16, 2008