QorIQ® Qonverge BSC9132 Dual-Core Processor and Dual-Core DSP

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Block Diagram

BSC9132 BD

QoriQ Qonverge BSC9132 Processor

Features

  • Power Architecture subsystem including two e500 processors with 512-Kbyte shared L2 cache
  • Two StarCore® SC3850 DSP subsystems, each with a 512-Kbyte private L2 cache
  • The MAPLE-B2P multi-accelerator platform engine supports functions that enable LTE-FDD/TDD, WiMAX and WCDMA/HSPA+ wireless standards, as well as common DSP function acceleration including FFT, DFT and Turbo Viterbi coding
  • Two DDR3/3L memory interfaces with 32-bit data width (40 bits including ECC), up to 1333 MHz data rate
  • Integrated security acceleration (SEC)
  • Trust architecture secure boot
  • Two RF interfaces supporting JESD207 (ADI)
  • Support of MaxPhy interface (Maxim)
  • Two triple-speed Gigabit-Ethernet controllers featuring network acceleration including IEEE 1588 v2 hardware support for two SGMII ports
  • USB 2.0 host and device controller
  • Two DUART, Two SPI, and two I2C controllers
  • Four-lane SerDes PHY that multiplexes the following:
    • Two Common Public Radio Interface (CPRI) controller lanes
    • USIM interface

Design Resources

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Hardware

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Software

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