Biometric Authentication Devices

BIOMETRIC-AUTHENTICATION

Block Diagram

Choose a diagram:

Kinetis Version

Biometric Authentication BD1

LPC Version

Biometric Authentication BD2

i.MX Version

Biometric Authentication BD3

Supported Devices

Wireless Connectivity

Bluetooth Low Energy

Processors and Microcontrollers

K8x Secure

Analog and Mixed Signal

Voltage Level Translators

Features

CPU Complex

  • Arm® Cortex®-A7 @ 696 MHz, 128 KB L2 cache
  • Advanced Power Management
  • Partial PMU Integration

Display

  • Parallel LCD Display up to WXGA (1366x768)
  • 8/10/16/24-bit Parallel Camera Sensor Interface

Memory

  • 16-bit LP-DDR2, DDR3/DDR3L
  • 8/16-bit Parallel NOR FLASH / PSRAM
  • Dual-channel Quad-SPI NOR FLASH
  • 8-bit Raw NAND FLASH with 40-bit ECC

Connectivity

  • 2x MMC 4.5/SD 3.0/SDIO Port
  • 2x USB 2.0 OTG, HS/FS, Device or Host with PHY
  • Audio Interfaces include 3x I2S/SAI, S/PDIF Tx/Rx
  • 2x 10/100 Ethernet with IEEE 1588
  • 2x 12-bit ADC, up to 10 input channel total, with resistive touch controller (4-wire/5-wire)

Security

  • Security Block: TRNG, Crypto Engine (AES with DPA, TDES/SHA/RSA), Tamper Monitor, Secure Boot, SIMV2/EVMSIM X 2, OTF DRAM
  • Encryption, PCI4.0 pre-certification

Documentation

Quick reference to our documentation types.

3 documents

Support

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