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Design Center
Training
High-Speed SERDES Modeling for the PCB and System Environment

High-Speed SERDES Modeling for the PCB and System Environment

About This Training

This session will review the high-speed signal channel (SERDES - serializer/deserializer) and its characteristics and illustrate how the TX and RX circuits in general are used to offset signal losses. It will also show key characteristics of the channels needed to allow these TX and RX circuits to work effectively. Learn about maximum length of the PCB channel, PCB-structures that need to be optimized and the usage oIBIS-AMI models for 5-10 Gbps operation. Examples of channels from PCB designs at NXP are included.

Training Outline

SERDES Key Features

Tool for SERDES Validation: QCVS

Basic TX EQ and RX EQ Simulations

Channel Analysis and Printed Circuit Board Considerations

IBIS-AMI Simulation Examples

Presented by

Jon Burnett
Digital Networking Hardware, NXP Semiconductors

MoreLess

DURATION

50 min

LANGUAGE

English

SKILL LEVEL

Beginner

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