P87C660X2BBD: 80C51 8-bit microcontroller family

Overview

The devices are Single-Chip 8-Bit Microcontrollers manufactured in an advanced CMOS process and are derivatives of the 80C51 microcontroller family. The instruction set is 100pct compatible with the 80C51 instruction set.

The devices support 6-clock/12-clock mode selection by programming an OTP bit (OX2) using parallel programming. In addition, an SFR bit (X2) in the clock control register (CKCON) also selects between 6-clock/12-clock mode.

These devices have either one or two I²C interfaces, capable of handling speeds up to 400 kbits/s (Fast I²C). They also have four 8-bit I/O ports, three 16-bit timer/event counters, a multi-source, four-priority-level, nested interrupt structure, an enhanced UART and on-chip oscillator and timing circuits.

The added features of the P8xC66xX2 make it a powerful microcontroller for applications that require pulse width modulation, high-speed I/O, I²C communication, and up/down counting capabilities such as motor control.

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Features

80C51 Central Processing Unit
- 16 kbytes OTP (87C660X2, 87C661X2)
- 16 kbytes ROM (83C660X2, 83C661X2)
- 512 byte RAM
- Boolean processor
- Fully static operation
- Low voltage (2.7 V to 5.5 V at 16 MHz) operation
12-clock operation with selectable 6-clock operation (via software or via parallel programmer)
Memory addressing capability
- Up to 64 kbytes ROM and 64 kbytes RAM
Power control modes:
- Clock can be stopped and resumed
- Idle mode
- Power-down mode
CMOS and TTL compatible
Two speed ranges at V_CC = 5 V
- 0 to 30 MHz with 6-clock operation
- 0 to 33 MHz with 12-clock operation
Parallel programming with 87C51 compatible hardware interface to programmer
RAM expandable externally to 64 kbytes
Programmable Counter Array (PCA)
- PWM
- Capture/compare
PLCC and LQFP packages
Extended temperature ranges
Dual Data Pointers
Security bits (3 bits)
Encryption array - 64 bytes
8/9 interrupt sources
Four interrupt priority levels
Four 8-bit I/O ports
One I²C serial port interface has a selectable data transfer mode, either 400 kB/sec Fast-mode or 100 kB/sec Standard-mode (8xC660X2 and 8xC661X2)
A second I 2 C serial port interface has the 400 kB/sec Fast data-transfer mode only and selectable slew rate control of the output pins (8xC661X2)
Full-duplex enhanced UART
- Framing error detection
- Automatic address recognition
Three 16-bit timers/counters T0, T1 (standard 80C51) and
Programmable clock-out pin
Asynchronous port reset
Low EMI (inhibit ALE, slew rate controlled outputs, and 6-clock mode)
Wake-up from Power Down by an external interrupt

MoreLess

Features

80C51 Central Processing Unit
- 16 kbytes OTP (87C660X2, 87C661X2)
- 16 kbytes ROM (83C660X2, 83C661X2)
- 512 byte RAM
- Boolean processor
- Fully static operation
- Low voltage (2.7 V to 5.5 V at 16 MHz) operation
12-clock operation with selectable 6-clock operation (via software or via parallel programmer)
Memory addressing capability
- Up to 64 kbytes ROM and 64 kbytes RAM
Power control modes:
- Clock can be stopped and resumed
- Idle mode
- Power-down mode
CMOS and TTL compatible
Two speed ranges at V_CC = 5 V
- 0 to 30 MHz with 6-clock operation
- 0 to 33 MHz with 12-clock operation
Parallel programming with 87C51 compatible hardware interface to programmer
RAM expandable externally to 64 kbytes
Programmable Counter Array (PCA)
- PWM
- Capture/compare
PLCC and LQFP packages
Extended temperature ranges
Dual Data Pointers
Security bits (3 bits)
Encryption array - 64 bytes
8/9 interrupt sources
Four interrupt priority levels
Four 8-bit I/O ports
One I²C serial port interface has a selectable data transfer mode, either 400 kB/sec Fast-mode or 100 kB/sec Standard-mode (8xC660X2 and 8xC661X2)
A second I 2 C serial port interface has the 400 kB/sec Fast data-transfer mode only and selectable slew rate control of the output pins (8xC661X2)
Full-duplex enhanced UART
- Framing error detection
- Automatic address recognition
Three 16-bit timers/counters T0, T1 (standard 80C51) and
Programmable clock-out pin
Asynchronous port reset
Low EMI (inhibit ALE, slew rate controlled outputs, and 6-clock mode)
Wake-up from Power Down by an external interrupt

Data Sheets

sot389-1_3d

Block diagram: P87C51RA2BA, P87C51RA2FA, P87C51RB2BA, P87C51RB2BBD, P87C51RB2BN, P87C51RB2FA, P87C51RC2BBD, P87C51RC2BN, P87C51RC2FA, P87C51RC2FN, P87C51RD2BA, P87C51RD2BBD, P87C51RD2FA, P87C51RD2FBD, P87C660X2BBD, P87C660X2FA

sot389-1_3d
Block diagram: P87C51RA2BA, P87C51RA2FA, P87C51RB2BA, P87C51RB2BBD, P87C51RB2BN, P87C51RB2FA, P87C51RC2BBD, P87C51RC2BN, P87C51RC2FA, P87C51RC2FN, P87C51RD2BA, P87C51RD2BBD, P87C51RD2FA, P87C51RD2FBD, P87C660X2BBD, P87C660X2FA

sot389-1_3d

Block diagram: P87C51RA2BA, P87C51RA2FA, P87C51RB2BA, P87C51RB2BBD, P87C51RB2BN, P87C51RB2FA, P87C51RC2BBD, P87C51RC2BN, P87C51RC2FA, P87C51RC2FN, P87C51RD2BA, P87C51RD2BBD, P87C51RD2FA, P87C51RD2FBD, P87C660X2BBD, P87C660X2FA

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