M5271EVB: MCF5271 Evaluation Board ARCHIVED

Overview

Specifications

Technical and Functional Specifications

Memory Devices
  • 16-Mbyte SDRAM
  • 2-Mbyte (512K x 16) Page Mode FLASH, upgradable to 4-Mbyte (512K x 32) Page mode FLASH
  • 1-Mbyte ASRAM (footprint only)
  • 64-Kbyte SRAM internal to MCF5271 device Peripherals
Peripherals
  • Ethernet port 10/100Mb/s (Dual-Speed Fast Ethernet Transceiver, with MII)
  • UART0 (RS-232 serial port for dBUG firmware)
  • UART1 (auxiliary RS-232 serial port)
  • UART2 (auxiliary RS-232 serial port)
  • I2C interface
  • QSPI interface to ADC
  • BDM/JTAG interface User Interface
User Interface
  • Reset logic switch (debounced)
  • Boot logic selectable (dip switch)
  • Abort/IRQ7 logic switch (debounced)
  • PLL Clocking options - Oscillator, Crystal, or SMA for external clocking signals
  • LEDs for power-up indication, general-purpose I/O, and timer output signals
  • Expansion connectors for daughter card Software
Software
  • Resident firmware package that provides a self-contained programming and operating environment (dBUG)
  • Evaluation software from leading third party tool vendors

Documents and Software

Documents   ( 1 )

Documents

Data Sheet  ( 1 )

  • MCF5271 Integrated Microprocessor Hardware Specification - Data Sheet (REV 4 )

    The MCF5271 family is a highly integrated implementation of the ColdFire ® family of reduced instruction set computing (RISC) microprocessors. This document describes pertinent features and functions of the MCF5271 family. The MCF5271 family includes the MCF5271 and MCF5270 microprocessors.This document is written from the perspective of the MCF5271 and unless otherwise noted, the information applies also to the MCF5270.

    •  PDF
    • 559.3 kB
    • 25 Aug 2009
    • MCF5271EC
    • [ English ]

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