Parallel Bus to One-Channel Fm+ and Two-Channel UFm I²C-Bus Controller

  • This page contains information on a product that is no longer manufactured (discontinued). Specifications and information herein are available for historical reference only.

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Block Diagram

PCU9669 Block Diagram

PCU9669 Block Diagram


Key Features

  • Parallel-bus to I²C-bus protocol converter and interface
  • 5 Mbit/s unidirectional data transfer on Ultra Fast-mode (UFm) channel (push-pull driver)
  • 1 Mbit/s and up to 30 mA SCL/SDA IOL Fast-mode Plus (Fm+) capability
  • Internal oscillator trimmed to 1 % accuracy reduces external components
  • Individual 4352-byte buffers for the Fm+ and UFm channels for a total of 13056 bytes of buffer space
  • Three levels of reset: individual software channel reset, global software reset, global hardware RESET pin
  • Communicates with up to 64 targets in one serial sequence
  • Sequence looping with interval timer
  • Supports SCL clock stretching (Fm+ only)
  • JTAG port available for boundary scan testing during board manufacturing process
  • Trigger input synchronizes serial communication exactly with external events
  • Maskable interrupts
  • Fast-mode Plus I²C-bus capable and compatible with SMBus
  • Operating supply voltage: 3.0 V to 3.6 V (device and host interface)
  • I²C-bus I/O supply voltage: 3.0 V to 5.5 V
  • Latch-up testing is done to JEDEC Standard JESD78, which exceeds 100 mA
  • ESD protection exceeds 8000 V HBM per JESD22-A114 and 1000 V CDM per JESD22-C101
  • Packages offered: LQFP48


Quick reference to our documentation types.

3 documents

Design Files

Quick reference to our design files types.

1 design file


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