The device is functionally compatible with the MC12040
phase-frequency detector, however the MOSAIC™ III process is used to
push the maximum frequency to 800MHz and significantly reduce the
dead zone of the detector. When the Reference (R) and VCO (V) inputs
are unequal in frequency and/or phase, the differential UP (U) and DOWN
(D) outputs will provide pulse streams which when subtracted and
integrated provide an error voltage for control of a VCO.
The device is packaged in a small outline, surface mount 8-lead SOIC
package. There are two versions of the device to provide I/O compatibility
to the two existing ECL standards. The MCH12140 is compatible with
MECL10H™ logic levels while the MCK12140 is compatible to 100K ECL
logic levels. This device can also be used in +5V systems. Please refer to
NXP® Application Note AN1406/D, "Designing with PECL (ECL at
+5.0V)" for more information.800MHz Typical Bandwidth
Small Outline 8-Lead SOIC Package
75k Ohms Internal Input Pulldown Resistors
>1000V ESD Protection
For proper operation, the input edge rate of the R and V inputs should
be less than 5ns.
Mosaic III and MECL 10H are trademarks of NXP®, Inc.