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The block diagram shows the functional blocks of the DSP56011. In addition, the DSP56011 offers switchable memory space configuration, a large user-definable Program ROM and two independent data RAMs and ROMs, a Serial Audio Interface (SAI), Serial Host Interface (SHI), parallel Host Interface (HI) with Direct Memory Access (DMA) (DMA) for communicating with other processors, dedicated I/O lines, on-chip Phase Lock Loop (PLL), On-Chip Emulation (OnCE) port, and on-chip Digital Audio Transmitter (DAX).
Table 1 lists the memory configurations of the DSP56011.
* These ROMs may be factory programmed with data/program provided by the application developer.
No Switch (PEA = 0, PEB = 0) |
Switch A (PEA = 1, PEB = 0) |
Switch B (PEA = 0, PEB = 1) |
Switch A + B (PEA = 1, PEB = 1) |
|
---|---|---|---|---|
P: RAM | 0.5 K | 1.25 K | 2.0 K | 2.75 K |
X: RAM | 4.0 K | 3.25 K | 3.25 K | 2.5 K |
Y: RAM | 4.25 K | 4.25 K | 3.5 K | 3.5 K |
P: ROM | 12.5 K | 12.5 K | 12.5 K | 12.5 K |
X: ROM | 3.5 K | 3.5 K | 3.5 K | 3.5 K |
Y: ROM | 2.0 K | 2.0 K | 2.0 K | 2.0 K |
Table 1 lists the memory configurations of the DSP56011.
* These ROMs may be factory programmed with data/program provided by the application developer.
No Switch (PEA = 0, PEB = 0) |
Switch A (PEA = 1, PEB = 0) |
Switch B (PEA = 0, PEB = 1) |
Switch A + B (PEA = 1, PEB = 1) |
|
---|---|---|---|---|
P: RAM | 0.5 K | 1.25 K | 2.0 K | 2.75 K |
X: RAM | 4.0 K | 3.25 K | 3.25 K | 2.5 K |
Y: RAM | 4.25 K | 4.25 K | 3.5 K | 3.5 K |
P: ROM | 12.5 K | 12.5 K | 12.5 K | 12.5 K |
X: ROM | 3.5 K | 3.5 K | 3.5 K | 3.5 K |
Y: ROM | 2.0 K | 2.0 K | 2.0 K | 2.0 K |