Dual Double-Pole Double-Throw Analog Switch

NX3DV3899

Product Details

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Block Diagram

NX3DV3899 Block Diagram

NX3DV3899 Block Diagram

Features

Key Features

  • Break-before-make switching
  • High noise immunity
  • CMOS low-power consumption
  • Latch-up performance exceeds 100 mA per JESD 78B Class II Level A
  • 1.8 V control logic at VCC = 3.6 V
  • Control input accepts voltages above supply voltage
  • Very low supply current, even when input is below VCC
  • High current handling capability (350 mA continuous current under 3.3 V supply)
  • Specified from –40 ℃ to +85 ℃ and from –40 ℃ to +125 ℃

Supply Voltage

  • 1.4 V to 4.3 V

Low ON Resistance (Peak)

  • 7.2 Ω (typical) at VCC = 1.4 V
  • 5.4 Ω (typical) at VCC = 1.65 V
  • 2.9 Ω (typical) at VCC = 2.5 V
  • 2.4 Ω (typical) at VCC = 3.0 V
  • 2.3 Ω (typical) at VCC = 3.6 V
  • 2.2 Ω (typical) at VCC = 4.3 V

ESD Protection

  • HBM JESD22-A114F Class 2A exceeds 2000 V (all pins)
  • HBM JESD22-A114F Class 3A exceeds 5000 V (I/O pins to GND)
  • MM JESD22-A115-A exceeds 200 V
  • CDM AEC-Q100-011 revision B exceeds 1000 V

Product Longevity Program

  • This product is included in the NXP Product Longevity Program ensuring a stable supply of products for your embedded designs. The NX3DV3899HR is included in the 15-year program

Documentation

Quick reference to our documentation types.

4 documents

Design Resources

Design Files

1 design file

Engineering Services

2 engineering services

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