2-bit I3C Bus Buffer with Voltage Level Translation Evaluation Board

P3B1602-EVB new
Preproduction
  • This page contains information on a preproduction product. Specifications and information herein are subject to change without notice. For additional information contact support or your sales representative.

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The P3B1602DP-EVB evaluation board is designed to enable easy testing, validation, and design-in of the P3B1602DP, a 2-bit I3C buffer with integrated auto-direction sensing and bidirectional voltage-level translation.

The standalone evaluation board is populated with series resistors that can be reworked during evaluation. It also supports the selection of different capacitive loads, allowing performance evaluation under various bus-loading conditions.

Block Diagram

Evaluation Board Circuit

2-Bit I3C-Bus Buffer with Bidirectional Voltage Level Translation Block Diagram
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Features

General Features

  • Standalone evaluation board for the P3B1602DP 2-bit I3C bus buffer with voltage level translation.
  • 30 Ω series resistors included
  • Supports capacitive load selection of 0 pF, 50 pF, 100 pF and 150 pF for evaluating performance under different bus loading conditions

Design Resources

Design Files

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