Toy Gamepad

Block Diagram

Toy Gamepad

Toy Gamepad

Supported Devices

Interfaces

USB Interfaces

General Purpose I/O (GPIO)

Processors and Microcontrollers

LPC54000 Arm Cortex-M4

Power Management

5 V PMIC Solutions

LED Drivers

RFID

NFC Readers

Connected NFC Tags

Wireless Connectivity

Bluetooth Low Energy

Features

Arm Cortex-M4 core (version r0p1)

  • Arm Cortex-M4 processor, running at a frequency of up to 220 MHz
  • Floating Point Unit (FPU) and Memory Protection Unit (MPU)
  • Arm Cortex-M4 built-in Nested Vectored Interrupt Controller (NVIC)
  • Non-maskable Interrupt (NMI) input with a selection of sources
  • Serial Wire Debug (SWD) with six instruction breakpoints, two literal comparators, and four watchpoints. Includes Serial Wire Output and ETM Trace for enhanced debug capabilities, and a debug timestamp counter
  • System tick timer

On-chip memory

  • Up to 512 KB on-chip flash program memory with flash accelerator and 256 bytes page erase and write
  • Up to 200 KB total SRAM consisting of 160 KB contiguous main SRAM and an additional 32 KB SRAM on the I&D buses. 8 KB of SRAM bank intended for USB traffic
  • 16 KB of EEPROM

Serial interfaces

  • Flexcomm Interface contains ten serial peripherals. Each Flexcomm Interface can be selected by software to be a USART, SPI, or I²C interface. Two Flexcomm Interfaces also include an I²S interface. Each Flexcomm Interface includes a FIFO that supports USART, SPI, and I²S if supported by that Flexcomm Interface. A variety of clocking options are available to each Flexcomm Interface and include a shared fractional baud-rate generator.
  • I²C-bus interfaces support Fast-mode and Fast-mode Plus with data rates of up to 1Mbit/s and with multiple address recognition and monitor mode. Two sets of true I²C pads also support High-Speed Mode (3.4 Mbit/s) as a target.
  • Two ISO 7816 Smart Card Interfaces with DMA support.
  • USB 2.0 high-speed host/device controller with on-chip high-speed PHY.
  • USB 2.0 full-speed host/device controller with on-chip PHY and dedicated DMA controller supporting crystal-less operation in device mode.
  • SPIFI with XIP feature uses up to four data lines to access off-chip SPI/DSPI/QSPI flash memory at a much higher rate than standard SPI or SSP interfaces.
  • Ethernet MAC with MII/RMII interface with Audio Video Bridging (AVB) support and dedicated DMA controller.
  • Two CAN FD modules with dedicated DMA controller.

Documentation

Quick reference to our documentation types.

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Support

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