1.8 V Simple Mobile Interface Link Bridge IC

  • This page contains information on a product that is no longer manufactured (discontinued). Specifications and information herein are available for historical reference only.

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PTN3700 Block Diagram

PTN3700 BD


General Features

  • Configurable as either Transmitter or Receiver
  • One of two serial transmission methods selectable (pixel clock referenced pseudo source synchronous or bit clock referenced true source synchronous)
  • 3 differential subLVDS high-speed serial lanes
  • One differential pixel clock
  • Configurable aggregate data bandwidth allowing up to 24-bit color, 60 fps XGA:
    • 1 lane at 30x serialization rate up to 650 Mbit/s
    • 2 lanes at 15x serialization rate up to 1300 Mbit/s
    • 3 lanes at 10x serialization rate up to 1.95 Gbit/s
  • Parity encoding (transmitter) and detection (receiver) with last valid pixel repetition
  • Advanced Frame Mixing function (in Receiver mode) for 24-bit color depth using conventional 18-bit displays or specially adapted '18-bit plus' displays
  • Parallel CMOS I/O based on interface definition of RGB888 plus HS, VS, DE
  • Very low power profile:
    • Shutdown mode for minimum idle power (< 3 uA typical)
    • Low-power Standby mode with input clock frequency auto-detect (< 3 uA typical)
    • Low active transmitter power: 18 mW (typ.) for QVGA and 40 mW (typ.) for WVGA
    • Low active receiver power: 15 mW (typ.) for QVGA and 36 mW (typ.) for WVGA
  • Slew rate control on receiver parallel CMOS outputs
  • Operates from a single 1.8 V ± 150 mV power supply
  • Configurable mirroring pinout (dependent on Tx or Rx mode and PSEL[1:0] inputs) for optimum single layer flex-foil flow-through in various application scenarios
  • Available in 56-ball VFBGA package

Part numbers include: PTN3700EV.


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