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The MPC8560ADS board is designed to aid hardware and software developers of the PowerQUICC® III family by providing an evaluation platform for the MPC8560 in the 783-pin FC-PBGA package. The ADS helps to fill the void between the traditional design-focused, electrical, circuit, and logical testing and actual customer applications. While the ADS cannot practically mimic every possible customer design, it does provide exposure to issues associated with the simultaneous operation of various interfaces and protocols that are likely to be found in specific market applications. In addition to verifying the simultaneous operation of interfaces and protocols, the ADS provides a level of systems performance characterization that will prove useful to users.
Using the ADS on-board resources and an associated debugger, developers are able to download and run code, set breakpoints, display memory and registers, and connect proprietary hardware via the expansion connectors. That code can then be incorporated into the desired system with the MPC8560 processor.
Who should order this product:
Developers using the MPC8560.
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256 kB I2C Boot EEPROM |
The primary objective of this user’s manual is to describe the functionality of the e500 embedded microprocessor core for software and hardware developers. The e500 processor core is a low-power implementation of the family of reduced instruction set computing (RISC) embedded processors that implement the Book E definition of the PowerPC architecture. The e500 is a 32-bit implementation of the Book E architecture using the lower words in the 64-bit general-purpose registers (GPRs).
This document defines a technical specification for the MPC8560/MPC8540 ADS; this development board will be used to verify the operation of the MPC8560 and MPC8540 integrated communications processors.
This errata describes corrections to the MPC8560 reference manual, Rev. 1.
MPC8560 PowerQUICC® III Integrated Communications Processor Reference Manual
e500 application binary interface user's guide
AN2665: This application note provides information to programmers so that they may write optimal code for the PowerPC ? e500 embedded microprocessor cores. The e500 core implements the Book E version of the PowerPC architecture. In addition, the e500 core adheres to the NXP Book E implementation standards (EIS). These standards were developed to ensure consistency among NXP?s Book E implementations.