Enhanced Performance HDMI/DVI Level Shifter with Voltage Regulator, Dongle Detect Support and Active DDC Buffer

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  • This page contains information on a product that is no longer manufactured (discontinued). Specifications and information herein are available for historical reference only.

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Block Diagram


PTN3381B Block Diagram


High-Speed TMDS Level Shifting

  • Converts four lanes of low-swing AC-coupled differential input signals to DVI v1.0 and HDMI v1.3a compliant open-drain current-steering differential output signals
  • Pin-programmable pre-emphasis feature
  • TMDS level shifting operation up to 1.65 Gbit/s per lane (165 MHz character clock)
  • TMDS level shifting operation up to 2.25 Gbit/s per lane (225 MHz character clock) using pre-emphasis feature
  • Integrated 50 Ω termination resistors for self-biasing differential inputs
  • Back-current safe outputs to disallow current when device power is off and monitor is on
  • Disable feature to turn off TMDS inputs and outputs and to enter low-power state

DDC Level Shifting

  • Integrated DDC buffering and level shifting (3.3 V source to 5 V sink side)
  • Rise time accelerator on sink-side DDC ports
  • 0 Hz to 400 kHz I²C-bus clock frequency
  • Back-power safe sink-side terminals to disallow backdrive current when power is off or when DDC is not enabled

HDMI Dongle Detect Support

  • Incorporates I²C target ROM
  • Responds to DDC read to address 81h with predetermined byte sequence
  • Feature enabled by pin DDET (must be enabled for correct operation in accordance with DisplayPort interoperability guideline)

HPD Level Shifting

  • HPD non-inverting level shift from 0 V on the sink side to 0 V on the source side, or from 5 V on the sink side to 3.3 V on the source side
  • Integrated 200 kO pull-down resistor on HPD sink input guarantees ‘input LOW’ when no display is plugged in
  • Back-power safe design on HPD_SINK to disallow backdrive current when power is off

5 V DC Voltage regulator

  • Generates 5 V for the DVI/HDMI connector from the 3.3 V DP_PWR pin supplied by the DisplayPort connector
  • Supports up to 75 mA of load current with an accuracy of ±300 mV
  • Only two external capacitors required
  • Eliminates need for an external 5 V regulator in dongle applications
  • Back drive protection on 5 V output
  • Short-circuit protection
  • Overcurrent protection


  • Power supply 3.3 V ± 10 %
  • ESD resilience to 4 kV HBM, 1 kV CDM
  • Support for optional HDMI dongle detection via DDC/I²C-bus channel
  • Power-saving modes (using output enable)
  • Back-current-safe design on all sink-side main link, DDC and HPD terminals
  • Transparent operation: no re-timing or software configuration required


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