Layerscape® Access LA1575 Programmable Wireless Platform

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  • This page contains information on a product that is no longer manufactured (discontinued). Specifications and information herein are available for historical reference only.

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Block Diagram

Layerscape LA1575 Processor Block Diagram

Layerscape LA1575 Processor Block Diagram


  • Multicore Arm® v8 Processors for user applications
  • Innovative programmable accelerator engines for signal processing.
  • Programmable low latency MAC layer processing engines
  • Programmable high-performance packet processing engines to over 10 Gbps
  • Configurable cryptographic offload engines
  • Multiple Ethernet interfaces including 10Gbps
  • DDR4 with ECC
  • PCIe gen 3.0
  • Integrated Trust architecture
  • Single source clocking

Key elements of the LA1575 SoC:

  • Simultaneous multi-standard support for 5G, Wi-Fi (802.11 ac and 802.11ax) and Wireline systems
  • Dynamic PHY and MAC resource allocation at run-time across protocols
  • Rapid deployment of evolving standards for mmWave, 802.11ax, 802.11ad and wireline
  • Comparable performance and efficiency to hard-wired solutions
  • Full software implementation allowing customer-differentiated feature sets and flexibility
  • Leverages extensive third party ecosystem providers and the rich library base for Layerscape and Arm 64-bit cores
  • Powered by the latest acceleration and secure platform technologies, packet offload and physical layer processing


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