BSC9132QDS: QorIQ® Qonverge BSC9132 QDS for Picocell Base Station Development ARCHIVED

Overview

Freescale BSC9132QDS Block Diagram

Specifications

Technical and Functional Specifications

Core Complex
  • Two e500 Power Architecture® processors with 512 KB shared L2 cache running at up to 1.2 GHz
  • Two StarCore® SC3850 DSPs, each with a 512 KB private L2 cache running at up to 1.2 GHz
Connectivity and Networking
  • Two Gigabit Ethernet RJ45 jacks with SGMII interconnect
  • PCI Express® x16 socket
  • TDM interfaces via four RJ11 jacks or two 6-pin test headers
  • Two CPRI SFP+ connectors
  • Three JESD207 connectors for TDD or FDD RF daughter cards
Memory System
  • Two banks of 2 GB DDR3 at 1333 MHz
  • 256 MB NAND/NOR flash
Basic Peripherals and Interconnect
  • SIM card slot with 3 V and 1.8 V support (Class B and Class C)
  • USB 2.0 Micro-AB socket
  • GPS antenna SMA connector
  • SD card slot
  • 2 RS-232 DB-9 connectors
  • IEEE® 1588 support card interface
Additional Features
  • FCC certified
  • ATX form factor
Software
  • VortiQa® LTE and WCDMA L1 software
  • SmartDSP OS
  • Linux® BSP
  • VortiQa software for networking
  • CodeWarrior®

Documents and Software

Documents   ( 2 )

Software   ( 1 )

Documents

Reference Manual  ( 1 )

  • BSC9132 QDS Board - Reference Manual

    BSC9132QDSRM: The BSC9132 QorIQ® Development System (QDS) is a high-performance computing evaluation, development, and test platform supporting the BSC9132 QorIQ Power Architecture processor.

    • PDF
    • Rev 0
    • May 21, 2014
    • 1.7 MB
    • BSC9132QDSRM
    • English

Application Note  ( 1 )

Software

Embedded Application Software  ( 1 )

Embedded Application Software - miscellaneous  ( 1 )

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