Dual DBUS Leader, Differential Drive, Frequency Spread

Product Details

Select a section:


  • Two Independent DBUS I/Os
  • Common SPI Interface for All Operations
  • Open-Drain Interrupt Output with Pull-up
  • Maskable Interrupts for Send and Receive Data Status
  • Automatic Message Cyclical Redundancy Checking (CRC)
  • Generation and Checking
  • Four-Stage Transmit and Receive Buffers
  • 8- to 16-Bit Messages with 0- to 8-Bit CRC
  • Independent Frequency Spreading for Each Channel


Quick reference to our documentation types.

1-5 of 6 documents

Show All

Design Resources

Select a section:

Engineering Services

2 engineering services

To find a complete list of our partners that support this product, please see our Partner Marketplace.


What do you need help with?