Contactless Reader Module

Block Diagram

Contactless Reader Module

Contactless Reader Module BD

Supported Devices




NFC Readers

Processors and Microcontrollers

KM Series Arm Cortex-M0+

Analog and Mixed Signal

Real-Time Clocks

Power Management

AC-DC Controllers with Integrated Power Switch


MCU Features

  • High-performance Arm® Cortex®-M0 core, up to 75 MHz of core clock frequency
  • 512 KB/256 KB/64 KB single array flash
  • Supports v6-M Instruction Set Architecture (ISA) including all 16-bit v7-M instructions plus a number of 32-bit thumb-2 instructions
  • PLL to generate clocks for AFE
  • FLL to generate core, system and flash clocks
  • Flexible modes of operation
  • Two internal trim-able clock references


  • Tamper detection with time stamping
  • Random number generator, memory protection unit
  • Memory Mapped Cryptographic Acceleration Unit (MMCAU) for AES Encryption
  • Cyclic Redundancy Check (CRC)

CLRC66303 Multiple interfaces to support a broad range of microcontrollers

  • Host interfaces: SPI, I2C, UART
  • Up to 8 GPOs
  • 512 byte FIFO buffer
  • high-security reader using SAM interface
  • Supported by NFC Cockpit and NFC Reader Library
  • Complete range of development kits and boards


Quick reference to our documentation types.

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