OM13040: Keil MCB4357 Evaluation Board and Internet Radio Solution

Overview

This board is no longer manufactured and will only be available while supplies last.

The Keil MCB4357 Evaluation Board enables you to create and test working programs based on the LPC4300 family of Dual Core Arm Cortex™-M4/M0 devices.

The MCB4357 Evaluation Board and Starter Kit includes the MDK-ARM Lite Edition Tools. These tools help you get started writing programs and testing the microcontroller and its capabilities. Additionally, an Internet Radio Solution demo is also available for download on this evaluation board. The Internet Radio Solution shows an example of application portioning between the two cores on the LPC4357.

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Keil MCB4357 Evaluation Board and Internet Radio Solution

LPC43xx block diagram

Keil MCB4357 Evaluation Board and Internet Radio Solution

NXP<sup>®</sup> LPC4357 Internet Radio Solution Overview

NXP^® LPC4357 Internet Radio Solution Overview

Specifications

Technical and Functional Specifications

Processor	LPC4357 204 MHz Arm^® Cortex^®-M4 processor LBGA256 Cortex^®-M0 coprocessor
Memory	On-Board Memory: 16 MB NOR Flash 4 MB Quad-SPI Flash 16 MB SDRAM & 16 KB EEPROM (I²C) 136 KB On-Chip SRAM 1 MB dual bank On-Chip Flash
Display	Color QVGA TFT LCD with touchscreen
Connectivity	10/100 Ethernet Port High-speed USB 2.0 Host/Device/OTG interface (USB host + Micro USB Device/OTG connectors) Full-speed USB 2.0 Host/Device interface (USB host + micro USB Device connectors) CAN interfaces Serial/UART Port MicroSD Card Interface
Sensor	Digital Temperature Sensor (I²C)
Power Management	Analog Voltage Control for ACD Input
Audio	Audio codec with Line-In/Out and Microphone/headphone connector + Speaker
Debug	Debug Interface Connectors 20-pin JTAG (0.1 inches) 10-pin Cortex debug (0.05 inches) 20-pin Cortex debug + ETM Trace (0.05 inch connector)
User Components	4 user push-buttons + reset

Supported Devices

Processors and Microcontrollers

LPC4300 Cortex-M4/M0

LPC4310FBD144 : High Performance 32-bit Microcontroller (MCU) based on Arm^® Cortex^®-M4/M0 Cores
LPC4310FET100 : Dual-core Cortex-M4/M0, 168 kB SRAM, CAN, AES, SPIFI, SGPIO, SCT
LPC4320FBD144 : High Performance 32-bit Microcontroller (MCU) based on Arm^® Cortex^®-M4/M0 Cores
LPC4320FET100 : High Performance 32-bit Microcontroller (MCU) based on Arm^® Cortex^®-M4/M0 Cores
LPC4330FBD144 : Dual-core Cortex-M4/M0, 264 kB SRAM, 2 HS USB with on-chip PHY, Ethernet, CAN, AES, SPIFI, SGPIO, SCT
LPC4330FET100 : Dual-core Cortex-M4/M0, 264 kB SRAM, 2 HS USB with on-chip PHY, Ethernet, CAN, AES, SPIFI, SGPIO, SCT
LPC4330FET180 : Dual-core Cortex-M4/M0, 264 kB SRAM, 2 HS USB with on-chip PHY, Ethernet, CAN, AES, SPIFI, SGPIO, SCT
LPC4330FET256 : Dual-core Cortex-M4/M0, 264 kB SRAM, 2 HS USB with on-chip PHY, Ethernet, CAN, AES, SPIFI, SGPIO, SCT
LPC4333FET256 : High Performance 32-bit Microcontroller (MCU) based on Arm^® Cortex^®-M4/M0 Cores
LPC4337FET256 : 32-bit Arm^® Cortex^®-M4/M0 MCU; up to 1 MB flash and 136 kB SRAM; Ethernet, two High-speed USB, LCD, EMC
LPC4350FET180 : Dual-core Cortex-M4/M0, 264 kB SRAM, 2 HS USB with on-chip PHY, Ethernet, LCD, CAN, AES, SPIFI, SGPIO, SCT
LPC4350FET256 : Dual-core Cortex-M4/M0, 264 kB SRAM, 2 HS USB with on-chip PHY, Ethernet, LCD, CAN, AES, SPIFI, SGPIO, SCT
LPC4353FET256 : High Performance 32-bit Microcontroller (MCU) based on Arm^® Cortex^®-M4/M0 Cores
LPC4357FET256 : High Performance 32-bit Microcontroller (MCU) based on Arm^® Cortex^®-M4/M0 Cores
LPC4317JBD144 : 32-bit Arm^® Cortex^®-M4/M0 MCU; up to 1 MB flash and 136 kB SRAM; Ethernet, two High-speed USB, LCD, EMC
LPC4317JET100 : High Performance 32-bit Microcontroller (MCU) based on Arm^® Cortex^®-M4/M0 Cores
LPC4327JET100 : High Performance 32-bit Microcontroller (MCU) based on Arm^® Cortex^®-M4/M0 Cores
LPC4337JBD144 : 32-bit Arm^® Cortex^®-M4/M0 MCU; up to 1 MB flash and 136 kB SRAM; Ethernet, two High-speed USB, LCD, EMC
LPC4337JET100 : 32-bit Arm^® Cortex^®-M4/M0 MCU; up to 1 MB flash and 136 kB SRAM; Ethernet, two High-speed USB, LCD, EMC
LPC4337JET256 : 32-bit Arm^® Cortex^®-M4/M0 MCU; up to 1 MB flash and 136 kB SRAM; Ethernet, two High-speed USB, LCD, EMC
LPC4357JBD208 : 32-bit Arm^® Cortex^®-M4/M0 MCU; up to 1 MB flash and 136 kB SRAM; Ethernet, two High-speed USB, LCD, EMC
LPC4357JET256 : High Performance 32-bit Microcontroller (MCU) based on Arm^® Cortex^®-M4/M0 Cores
LPC4367JBD208 : High Performance 32-bit Microcontroller based on Arm^® Cortex^®-M4/M0
LPC4367JET100 : High Performance 32-bit Microcontroller based on Arm^® Cortex^®-M4/M0
LPC4367JET256 : High Performance 32-bit Microcontroller based on Arm^® Cortex^®-M4/M0
LPC43S70FET100 : 32-bit Arm^® Cortex^®-M4 + 2 x M0 MCU; 282 kB SRAM; Ethernet; two HS USBs; 80 Msps 12-bit ADC; configurable peripherals, AES engine
LPC43S70FET256 : 32-bit Arm^® Cortex^®-M4 + 2 x M0 MCU; 282 kB SRAM; Ethernet; two HS USBs; 80 Msps 12-bit ADC; configurable peripherals, AES engine

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OM13040 ^Active
Keil MCB4357 Evaluation Board and Internet Radio Solution

OM13040,598
1 @ US
$330.00

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Distributor

Distributor Name	Region	Inventory	Inventory Date

Upon selection of a preferred distributor, you will be directed to their web site to place and service your order. Please be aware that distributors are independent businesses and set their own prices, terms and conditions of sale. NXP makes no representations or warranties, express or implied, about distributors, or the prices, terms and conditions of sale agreed upon by you and any distributor.

Documents and Software

Software ( 2 )

Development Software ( 1 )
- IDE and Build Tools ( 1 )
Embedded Software ( 1 )
- Code Snippets ( 1 )

Documents

Application Note ( 12 )

Implementing a UART using SGPIO on LPC4300 ^{(REV
1.0
)}
- ZIP
- 1.7 MB
- 22 Jul 2013
- AN11351
- [ English ]
SGPIO camera module design using LPC4300 ^{(REV
1.0
)}
- ZIP
- 4.1 MB
- 22 Jul 2013
- AN11343
- [ English ]
UUencoding for UART ISP^{(REV
1.0
)}
- PDF
- 142.1 kB
- 06 Jul 2012
- AN11229
- [ English ]
Inter Processor Communication on LPC43xx^{(REV
2.0
)}
- ZIP
- 999.7 kB
- 28 Aug 2014
- AN11177
- [ English ]
LPC4300 camera interface design using SGPIO ^{(REV
1.1
)}
- ZIP
- 1.8 MB
- 21 Jul 2013
- AN11196
- [ English ]
In-System Programming of LPC18xx/43xx flash^{(REV
1.0
)}
- ZIP
- 426.8 kB
- 09 Aug 2013
- AN11248
- [ English ]
How to implement the PMBus software stack ^{(REV
1.0
)}
- ZIP
- 1.1 MB
- 22 Jul 2013
- AN11318
- [ English ]
Using SPIFI on LPC1800 and LPC4300^{(REV
1.0
)}
- ZIP
- 7.2 MB
- 09 Aug 2013
- AN11206
- [ English ]
Bootmode jumper settings for LPC1800 and LPC4300^{(REV
1.0
)}
- PDF
- 247.0 kB
- 23 Jul 2012
- AN11239
- [ English ]
Using SGPIO to emulate an SPI master interface^{(REV
1.0
)}
- ZIP
- 197.0 kB
- 20 Feb 2019
- AN11210
- [ English ]
SGPIO on the LPC4300^{(REV
1.1
)}
- ZIP
- 993.0 kB
- 09 Aug 2013
- AN11275
- [ English ]
PCB layout guidelines for NXP^® MCUs in BGA packages^{(REV
2.0
)}
- PDF
- 272.0 kB
- 22 Apr 2011
- AN10778
- [ English ]

Users Guide ( 2 )

LPC43xx/LPC43Sxx Arm® Cortex®-M4/M0 multi-core microcontroller^{(REV
2.5
)}

The LPC43xx/LPC43Sxx are Arm Cortex-M4 based micro-controllers for embedded applications which include an Arm Cortex-M0 co-processor, up to 1 MB of flash, up to 264 kB of SRAM, and operate at CPU frequencies of up to 204 MHz.
- PDF
- 13.6 MB
- 13 Sep 2019
- UM10503
- [ English ]
NXP^® Internet Radio Audio Streaming Solution - User Manual^{(REV
1.0
)}

NXP Internet Radio Audio Streaming Solution - User’s Manual
- PDF
- 283.7 kB
- 21 Apr 2016
- MCB4357-OM13040UG
- [ English ]

Brochure ( 6 )

NXP^® 204 MHz, 32-bit Cortex-M4 /Cortex-M0 DSC LPC4300 series; First asymmetrical, dual-core digital signal controller featuring Cortex-M4 and Cortex-M0^{(REV
1.0
)}
- PDF
- 797.0 kB
- 01 Nov 2012
- 75017216
- [ English ]
First asymmetrical, dual-core digital signal controller featuring Cortex-M4 & Cortex-M0; NXP^® 150 MHz, 32-bit Cortex-M4 /Cortex-M0 DSC LPC4300 series^{(REV
1.0
)}
- PDF
- 812.0 kB
- 01 Feb 2011
- 75017013
- [ English ]
First Asymemetrical, dual-core digital signal controller featuring Cortex-M4 & Cortex-M0^{(REV
1.0
)}
- PDF
- 230.0 kB
- 01 Aug 2011
- LPC4300_1
- [ English ]
NXP^® 120 MHz, 32-bit Cortex-M4 DSC LPC407x/LPC408x; Cortex-M4 DSC with FPU, Ethernet, USB, optional LCD, and NXP’s SPIFI^{(REV
1.0
)}
- PDF
- 521.0 kB
- 01 Nov 2012
- 75017336
- [ English ]
NXP^® LPC4357-based solution for internet radi^{(REV
1.0
)}
- PDF
- 2.4 MB
- 31 Dec 2013
- 75017497
- [ English ]
Cortex-M4 MCUs with Cortex-M0 coprocessor, HS USB, and more^{(REV
1.0
)}
- PDF
- 1.0 MB
- 30 Oct 2013
- 75017486
- [ English ]

Supporting Information ( 2 )

Connecting a USB power switch to the LPC18xx / LPC43xx^{(REV
1.0
)}
- PDF
- 76.0 kB
- 06 Mar 2013
- TN00007
- [ English ]
LPC1800 and LPC4300 MxMEMMAP memory map^{(REV
1.0
)}
- PDF
- 148.0 kB
- 06 Dec 2012
- TN00006
- [ English ]

Software

Development Software ( 1 )

IDE and Build Tools ( 1 )

LPCXpresso IDE v8.2.2

The popular Free Edition has been enhanced to include many features previously only available in the premium Red Suite product, including C++ support, and its download limit has been doubled to 256kb. The Pro Edition of LPCXpresso gives developers unlimited code size downloads and one year of email-based support provided directly by NXP engineers. Note that LPCXpresso IDE has been replaced by MCUXpresso IDE.

Download Options

Embedded Software ( 1 )

Code Snippets ( 1 )

AN11161 - Using the SCT in LPCXpresso, Keil, and IAR^{(REV
1.0
)}
- ZIP
- 4.2 MB
- 2015-08-05 00:00:00
- AN11161_V1
Download

OM13040: Keil MCB4357 Evaluation Board and Internet Radio Solution

Overview

Specifications

Technical and Functional Specifications

Supported Devices

Processors and Microcontrollers

Buy

OM13040 Active

Related Products

Documents and Software

Documents ( 22 )

Software ( 2 )

Documents

Application Note ( 12 )

Implementing a UART using SGPIO on LPC4300 (REV 1.0 )

SGPIO camera module design using LPC4300 (REV 1.0 )

UUencoding for UART ISP (REV 1.0 )

Inter Processor Communication on LPC43xx (REV 2.0 )

LPC4300 camera interface design using SGPIO (REV 1.1 )

In-System Programming of LPC18xx/43xx flash (REV 1.0 )

How to implement the PMBus software stack (REV 1.0 )

Using SPIFI on LPC1800 and LPC4300 (REV 1.0 )

Bootmode jumper settings for LPC1800 and LPC4300 (REV 1.0 )

Using SGPIO to emulate an SPI master interface (REV 1.0 )

SGPIO on the LPC4300 (REV 1.1 )

PCB layout guidelines for NXP® MCUs in BGA packages (REV 2.0 )

Users Guide ( 2 )

LPC43xx/LPC43Sxx Arm® Cortex®-M4/M0 multi-core microcontroller (REV 2.5 )

NXP® Internet Radio Audio Streaming Solution - User Manual (REV 1.0 )

Brochure ( 6 )

NXP® 204 MHz, 32-bit Cortex-M4 /Cortex-M0 DSC LPC4300 series; First asymmetrical, dual-core digital signal controller featuring Cortex-M4 and Cortex-M0 (REV 1.0 )

First asymmetrical, dual-core digital signal controller featuring Cortex-M4 & Cortex-M0; NXP® 150 MHz, 32-bit Cortex-M4 /Cortex-M0 DSC LPC4300 series (REV 1.0 )

First Asymemetrical, dual-core digital signal controller featuring Cortex-M4 & Cortex-M0 (REV 1.0 )

NXP® 120 MHz, 32-bit Cortex-M4 DSC LPC407x/LPC408x; Cortex-M4 DSC with FPU, Ethernet, USB, optional LCD, and NXP’s SPIFI (REV 1.0 )

NXP® LPC4357-based solution for internet radi (REV 1.0 )

Cortex-M4 MCUs with Cortex-M0 coprocessor, HS USB, and more (REV 1.0 )

Supporting Information ( 2 )

Connecting a USB power switch to the LPC18xx / LPC43xx (REV 1.0 )

LPC1800 and LPC4300 MxMEMMAP memory map (REV 1.0 )

Software

Development Software ( 1 )

IDE and Build Tools ( 1 )

Embedded Software ( 1 )

Code Snippets ( 1 )

AN11161 - Using the SCT in LPCXpresso, Keil, and IAR (REV 1.0 )

OM13040 ^Active

Implementing a UART using SGPIO on LPC4300 ^{(REV
1.0
)}

SGPIO camera module design using LPC4300 ^{(REV
1.0
)}

UUencoding for UART ISP^{(REV
1.0
)}

Inter Processor Communication on LPC43xx^{(REV
2.0
)}

LPC4300 camera interface design using SGPIO ^{(REV
1.1
)}

In-System Programming of LPC18xx/43xx flash^{(REV
1.0
)}

How to implement the PMBus software stack ^{(REV
1.0
)}

Using SPIFI on LPC1800 and LPC4300^{(REV
1.0
)}

Bootmode jumper settings for LPC1800 and LPC4300^{(REV
1.0
)}

Using SGPIO to emulate an SPI master interface^{(REV
1.0
)}

SGPIO on the LPC4300^{(REV
1.1
)}

PCB layout guidelines for NXP^® MCUs in BGA packages^{(REV
2.0
)}

LPC43xx/LPC43Sxx Arm® Cortex®-M4/M0 multi-core microcontroller^{(REV
2.5
)}

NXP^® Internet Radio Audio Streaming Solution - User Manual^{(REV
1.0
)}

NXP^® 204 MHz, 32-bit Cortex-M4 /Cortex-M0 DSC LPC4300 series; First asymmetrical, dual-core digital signal controller featuring Cortex-M4 and Cortex-M0^{(REV
1.0
)}

First asymmetrical, dual-core digital signal controller featuring Cortex-M4 & Cortex-M0; NXP^® 150 MHz, 32-bit Cortex-M4 /Cortex-M0 DSC LPC4300 series^{(REV
1.0
)}

First Asymemetrical, dual-core digital signal controller featuring Cortex-M4 & Cortex-M0^{(REV
1.0
)}

NXP^® 120 MHz, 32-bit Cortex-M4 DSC LPC407x/LPC408x; Cortex-M4 DSC with FPU, Ethernet, USB, optional LCD, and NXP’s SPIFI^{(REV
1.0
)}

NXP^® LPC4357-based solution for internet radi^{(REV
1.0
)}

Cortex-M4 MCUs with Cortex-M0 coprocessor, HS USB, and more^{(REV
1.0
)}

Connecting a USB power switch to the LPC18xx / LPC43xx^{(REV
1.0
)}

LPC1800 and LPC4300 MxMEMMAP memory map^{(REV
1.0
)}

AN11161 - Using the SCT in LPCXpresso, Keil, and IAR^{(REV
1.0
)}