Design a platform that allows design solutions with the new IEEE Time-Sensitive Networking (TSN) standard.
|LS1021A TSN Block Diagram|
|QorIQ® Layerscape 1021A Dual-Core Communications Processor||Dual Arm v7 Cortex®-A7 32-bit cores, each supporting dual precision floating point and NEON SIMD module running up to 1.2 GHz, 4 external Gigabit Ethernet Interfaces with TSN, Per-stream policing, Credit-based shaper (802.1Qav), Time-aware shaper (802.1Qbv).|
|QorIQ® Layerscape 1028A Industrial Applications Processor||This is for applications that need more processing along with the TSN support. The LS1028A is a dual-core Arm™ Cortex-A72 with TSN hardware module and a hardware switch.|
|K22_120: Kinetis® K22-120 MHz, Cost Effective, Full-Speed USB Microcontrollers (MCUs) based on Arm® Cortex®-M4 Core||Running up to 20 MHz, a 512 kB flash memory, low power crystal-less USB in 64 LQFP package, OpenSDAv2 offers options for serial communication, flash programming, and run-control debugging.|
|Five- Ports AVB & TSN Automotive Ethernet Switch||The SJA1105TEL switch offers a flexible solution for implementing modular and cost-optimized Electronic Control Units (ECUs) using Ethernet as the backbone for control applications.|
|Galvanically isolated high-speed CAN transceiver||TJA1052i is a high-speed CAN transceiver that provides a galvanically isolated interface between a Controller Area Network protocol controller and the physical two-wire CAN bus.|
Start with the basics of the User Guide, setup your hardware, run examples and develop on baremetal framework using example files.
Start the design of a Time-Sensitive Networking Solution using a LS1021a MCU based on the Design References Documents, this will give you a head start for the developing.