Ultra-Low-Power Audio Codec

SGTL5000

Product Details

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Block Diagram

SGTL5000_BD

 NXP<sup>&#174;</sup> SGTL5000 Simplified Application Drawing

Features

Analog Inputs

  • Stereo Line In
    • Support for external analog input
    • Codec bypass for low power
  • MIC
    • MIC bias provided
    • Programmable MIC gain
    • Auto volume control
  • ADC
    • 85 dB SNR and -70 dB THD+N (VDDA=1.8 V)
    • 93 dB SNR and -73 dB THD+N (VDDA = 3.3 V)

Analog Outputs

  • DAC/Line Out
    • 100 dB SNR and -85 dB THD+N (VDDA=3.3 V)
  • DAP/HP Output
    • 98 dB SNR and -80 dB THD+N(VDDA=1.8 V 16 Ohm load, DAC to headphone)
    • 45 mW max into 16 Ohm load @ 3.3 V
    • Capless design
    • Very good PSRR without Lin Reg.
    • Only two external components needed for digital playback
    • Ramped digital volumes
    • Popless volume
    • 0.5 db analog volume steps (0 db to – 64 db)

Digital I/O

  • I2S port to allow routing to applications processor
  • Standard sample rates supported: 8 ks, 16 ks, 32 ks, 48 ks, 9.6 kHz, 11.25 khz, 22.05 ks, 44.1 ks

Integrated Digital Audio Processing

  • Surround, bass, tone control/parametric equalizer/graphic equalizer

Clocking/Control

  • PLL allows input of 6.144 MHz to 27 Mhz
  • Standard audio clocks derived from PLL

Power Supplies

  • Operates from 1.62 V to 3.6 V to maximize performance while minimizing power consumption

Package

  • 3 mm x 3 mm 20-pin QFN
  • 5 mm x 5 mm 32-pin QFN

Product Longevity


Benefits


  • High performance at low power for DAC-to-HP
    • 101 dB SNR @ < 9.3 mW
      Extremely low power modes
    • 98 dB SNR @ < 4 mW
      Small PCB footprint
    • 3 mm x 3 mm QFN
      Allows for no-cost system customization
    • NXP

Design Resources

Documentation

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Engineering Services

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