SGTL5000 | Ultra-Low-Power Audio Codec

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The SGTL5000 is a low-power stereo codec designed to provide a comprehensive audio solution for portable products that require line-in, mic-in, line-out, headphone-out and digital I/O.

Featuring:

Ultra-low-power with very high performance and functionality
Capless headphone and an integrated PLL to allow clock reuse within the system that helps achieve a lower overall system cost.

Data Sheet

Application Notes

Product Details

Block Diagram

SGTL5000_BD

NXP<sup>®</sup> SGTL5000 Simplified Application Drawing

Get diagram PDF

Features

Analog Inputs

Stereo Line In
- Support for external analog input
- Codec bypass for low power
MIC
- MIC bias provided
- Programmable MIC gain
- Auto volume control
ADC
- 85 dB SNR and -70 dB THD+N (VDDA=1.8 V)
- 93 dB SNR and -73 dB THD+N (VDDA = 3.3 V)

Analog Outputs

DAC/Line Out
- 100 dB SNR and -85 dB THD+N (VDDA=3.3 V)
DAP/HP Output
- 98 dB SNR and -80 dB THD+N(VDDA=1.8 V 16 Ohm load, DAC to headphone)
- 45 mW max into 16 Ohm load @ 3.3 V
- Capless design
- Very good PSRR without Lin Reg.
- Only two external components needed for digital playback
- Ramped digital volumes
- Popless volume
- 0.5 db analog volume steps (0 db to – 64 db)

Digital I/O

I2S port to allow routing to applications processor
Standard sample rates supported: 8 ks, 16 ks, 32 ks, 48 ks, 9.6 kHz, 11.25 khz, 22.05 ks, 44.1 ks

Integrated Digital Audio Processing

Surround, bass, tone control/parametric equalizer/graphic equalizer

Clocking/Control

PLL allows input of 6.144 MHz to 27 Mhz
Standard audio clocks derived from PLL

Power Supplies

Operates from 1.62 V to 3.6 V to maximize performance while minimizing power consumption

Package

3 mm x 3 mm 20-pin QFN
5 mm x 5 mm 32-pin QFN

Product Longevity

This product is included in NXP ^{^®}.s product longevity program, with assured supply for a minimum of 10 years after launch

Benefits

High performance at low power for DAC-to-HP
- 101 dB SNR @ < 9.3 mW, Extremely low power modes
- 101 dB SNR @ < 9.3 mW, Extremely low power modes
- 98 dB SNR @ < 4 mW, Small PCB footprint
- 3 mm x 3 mm QFN, Allows for no-cost system customization

Buy/Parametrics

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Documentation

Quick reference to our documentation types

5 documents

Compact List

AN3663, SGTL5000 Initialization and Programming - Application Note[AN3663]Featured

PDFFeb 25, 2011Rev 3.0
AN3664, SGTL5000 I2S DSP Mode[AN3664]Featured

PDFNov 14, 2011Rev 2.0

SGTL5000, Low Power Stereo Codec with Headphone Amp - Data Sheet[SGTL5000]Featured

PDFJan 12, 2022Rev 7

SGTL5000 Silicon Errata - Errata[SGTL5000ER]

PDFJun 6, 2013Rev 2.0

KITSGTL5000 Evaluation Platform - User Guide[KTSGTL5000UG]

PDFApr 5, 2012Rev 2.0

Design Resources

Design Files

Quick reference to our design files types.

1 design file

Receive the full breakdown. See the product footprint and more in the eCad file.

Printed Circuit Boards and Schematics
SGTL5000 stereo codec evaluation platform schematicsFeatured

PDFRev AMar 24, 2008 00:00:001.5 MBSGTL5000SCH

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Hardware

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Software

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1 software file

BSPs and Device Drivers
SGTL5000 stereo codec evaluation platform control softwareFeatured

ZIPRev 1.0.1.8Aug 19, 2008 00:00:00388.0 KBKITSGTL5000EVBE-BSP

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Ultra-Low-Power Audio Codec

Product Details

Block Diagram

SGTL5000_BD

Features

Analog Inputs

Analog Outputs

Digital I/O

Integrated Digital Audio Processing

Clocking/Control

Power Supplies

Package

Product Longevity

Benefits

Buy/Parametrics

Documentation

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Application Note (2)

AN3663, SGTL5000 Initialization and Programming - Application Note[AN3663]Featured

AN3664, SGTL5000 I2S DSP Mode[AN3664]Featured

Data Sheet (1)

SGTL5000, Low Power Stereo Codec with Headphone Amp - Data Sheet[SGTL5000]Featured

Errata (1)

SGTL5000 Silicon Errata - Errata[SGTL5000ER]

User Guide (1)

KITSGTL5000 Evaluation Platform - User Guide[KTSGTL5000UG]

AN3663, SGTL5000 Initialization and Programming - Application NoteFeatured

AN3664, SGTL5000 I2S DSP ModeFeatured

SGTL5000, Low Power Stereo Codec with Headphone Amp - Data SheetFeatured

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SGTL5000 stereo codec evaluation platform schematicsFeatured

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