The LPC407x is an Arm Cortex-M4 based digital signal controller for embedded applications requiring a high level of integration and low power dissipation.
The Arm Cortex-M4 is a next generation core that offers system enhancements such as low power consumption, enhanced debug features, and a high level of support block integration. The Arm Cortex-M4 CPU incorporates a 3-stage pipeline, uses a Harvard architecture with separate local instruction and data buses as well as a third bus for peripherals, and includes an internal prefetch unit that supports speculative branching. The Arm Cortex-M4 supports single-cycle digital signal processing and SIMD instructions. A hardware floating-point processor is integrated in the core for several versions of the part.
The LPC407x adds a specialized flash memory accelerator to accomplish optimal performance when executing code from flash. The LPC407x is targeted to operate at up to 120 MHz CPU frequency.
The peripheral complement of the LPC407x includes up to 512 kB of flash program memory, up to 96 kB of SRAM data memory, up to 4032 byte of EEPROM data memory, External Memory controller (EMC), Ethernet, USB Device/Host/OTG, an SPI Flash Interface (SPIFI), a General Purpose DMA controller, five UARTs, three SSP controllers, three I2C-bus interfaces, a Quadrature Encoder Interface, four general purpose timers, two general purpose PWMs with six outputs each and one motor control PWM, an ultra-low power RTC with separate battery supply and event recorder, a windowed watchdog timer, a CRC calculation engine and up to 165 general purpose I/O pins.
The analog peripherals include one eight-channel 12-bit ADC, two analog comparators, and a DAC.
The pinout of LPC407x is intended to allow pin function compatibility with the LPC24xx/23xx as well as the LPC178x/7x families.
Quick reference to our documentation types.
1-5 of 8 documents
1-5 of 6 design files
