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The LPC2157/2158 is a multi-chip module consisting of a LPC2138/2148 single-chip microcontroller combined with a PCF8576D Universal LCD driver in a low-cost 100-pin package. The LCD driver provides 32 segments and supports from 1 to 4 backplanes. Display overhead is minimized by an on-chip display RAM with auto-increment addressing. Refer to the respective LPC2148 and LPC2138 user manual for details.
32 kB to 40 kB of on-chip static RAM and 512 kB of on-chip flash memory.
USB 2.0 Full-speed compliant device controller with 2 kB of endpoint RAM.
An additional 8 kB of on-chip RAM accessible to USB by DMA (LPC2158 only).
32 segment x 4 backplane LCD controller supports from 1 to 4 backplanes.
Single 10-bit DAC provides variable analog output.
Low power Real-Time Clock (RTC) with independent power and 32 kHz clock input.
Multiple serial interfaces including two UARTs (16C550), two Fast I²C-bus (400 kbit/s), SPI and SSP with buffering and variable data length capabilities.
Single power supply chip with POR and BOD circuits:
CPU operating voltage range of 3.0 V to 3.6 V (3.3 V +- 10 pct) with 5 V tolerant I/O pads.
100-pin LQFP package with 38 microcontroller I/O pins minimum.
Individual enable/disable of peripheral functions as well as peripheral clock scaling for additional power optimization.
32 kB to 40 kB of on-chip static RAM and 512 kB of on-chip flash memory.
USB 2.0 Full-speed compliant device controller with 2 kB of endpoint RAM.
An additional 8 kB of on-chip RAM accessible to USB by DMA (LPC2158 only).
32 segment x 4 backplane LCD controller supports from 1 to 4 backplanes.
Single 10-bit DAC provides variable analog output.
Low power Real-Time Clock (RTC) with independent power and 32 kHz clock input.
Multiple serial interfaces including two UARTs (16C550), two Fast I²C-bus (400 kbit/s), SPI and SSP with buffering and variable data length capabilities.
Single power supply chip with POR and BOD circuits:
CPU operating voltage range of 3.0 V to 3.6 V (3.3 V +- 10 pct) with 5 V tolerant I/O pads.
100-pin LQFP package with 38 microcontroller I/O pins minimum.
Individual enable/disable of peripheral functions as well as peripheral clock scaling for additional power optimization.
