32-bit ARM Cortex-M4 + 2 x M0 MCU; 282 kB SRAM; Ethernet; two HS USBs; 80 Msps 12-bit ADC; configurable peripherals
The LPC4370 are ARM Cortex-M4 based microcontrollers for embedded applications which include an ARM Cortex-M0 coprocessor and an ARM Cortex-M0 subsystem for managing peripherals, 282 kB of SRAM, advanced configurable peripherals such as the State Configurable Timer (SCT) and the Serial General Purpose I/O (SGPIO) interface, two High-speed USB controllers, Ethernet, LCD, an external memory controller, and multiple digital and analog peripherals including a high-speed 12-bit ADC. The LPC4370 operate at CPU frequencies of up to 204 MHz.
The ARM Cortex-M4 is a next generation 32-bit core that offers system enhancements such as low power consumption, enhanced debug features, and a high level of support block integration. The ARM Cortex-M4 CPU incorporates a 3-stage pipeline, uses a Harvard architecture with separate local instruction and data buses as well as a third bus for peripherals, and includes an internal prefetch unit that supports speculative branching. The ARM Cortex-M4 supports single-cycle digital signal processing and SIMD instructions. A hardware floating-point processor is integrated in the core.
The LPC4370 include an application ARM Cortex-M0 coprocessor and a second ARM Cortex-M0 subsystem for managing the SGPIO and SPI peripherals. The ARM Cortex-M0 core is an energy-efficient and easy-to-use 32-bit core which is code- and tool-compatible with the Cortex-M4 core. Both Cortex-M0 cores offer up to 204 MHz performance with a simple instruction set and reduced code size.
|Nperi||number of peripherals||TIM; Nbit = 32 bit||4|
|Nperi||number of peripherals||WDT||1|
|Nperi||number of peripherals||RTC||1|
|Nperi||number of peripherals||TIM; System tick timer||1|
|Nperi||number of peripherals||PWM||1|
|Nperi||number of peripherals||IrDA; one USART with IrDA interface||1|
|Nperi||number of peripherals||CAN; fbit ≤ 1 Mbit/s||2|
|Nperi||number of peripherals||ETH; fbit ≤ 100 Mbit/s||1|
|Nperi||number of peripherals||I²S||2|
|Nperi||number of peripherals||SPI||1|
|Nperi||number of peripherals||SPIFI; fbit ≤ 40 Mbit/s||4|
|Nperi||number of peripherals||USB; high-speed||2|
|Nperi||number of peripherals||I²C||2|
|Nperi||number of peripherals||UART||4|
|Nio||number of I/O terminals||164|
|Nperi||number of peripherals||QEI||1|
|Nperi||number of peripherals||EMI||1|
|Nperi||number of peripherals||GLCDC||1|
|Nperi||number of peripherals||SDMMC||1|
|Nbyte(on-chip)||on-chip memory||BOOT ROM||64||kB|
|Nperi||number of peripherals||DAC; Nbit = 10 bit||1|
|Nperi||number of peripherals||ADC channels; Nbit = 10 bit||8|
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