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The NXP analog product development boards provide an easy-to-use platform for evaluating NXP products. The boards support a range of analog, mixed-signal and power solutions. They incorporate monolithic integrated circuits and system-in-package devices that use proven high-volume technology. NXP products offer longer battery life, a smaller form factor, reduced component counts, lower cost and improved performance in powering state-of-the-art systems.
This page will guide you through the process of setting up and using the PF9453 QFN evaluation board.
The kit contents include:
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In addition to the kit contents, the following hardware is necessary or beneficial when working with this board.
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This evaluation board requires a Windows PC workstation. Meeting these minimum specifications should produce great results when working with this evaluation board:
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Installing software is necessary to work with this evaluation board. All listed software is available on the PF9453 QFN Evaluation Board information page or from the provided link.
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Overview of the PF9453 board.
Table 1. Evaluation board jumper descriptions
Name | Default | Description |
---|---|---|
J1 |
CLOSED | Connects BUCK1_OUT voltage to ADC0 channel |
J2 |
1 to 2 |
Select source voltage for VSYS and PSYS (PMIC input voltage):
|
J3 |
CLOSED | Connects BUCK2_OUT voltage to ADC1 channel |
J4 |
CLOSED | Connects LDO1_OUT voltage to ADC4 channel |
J5 |
CLOSED | Connects BUCK3_OUT voltage to ADC2 channel |
J6 |
CLOSED | Connects LDO_SNVS voltage to ADC5 channel |
J7 |
CLOSED | Connects BUCK4_OUT voltage to ADC3 channel |
J8 |
CLOSED | Connects PSYS voltage to ADC6 channel |
J9 |
2 to 3 |
Select source voltage for VIO (Voltage for input and output signals):
|
J10 |
1 to 2 |
Select output voltage of the external LDO (U2) :
|
J11 |
1 to 2 |
Select if SCL_PMIC signal (PMIC I²C signal) passes through the level shifter (U3) or not:
|
J12 |
1 to 2 |
Select if SDA_PMIC signal (PMIC I²C signal) passes through the level shifter (U3) or not:
|
J14 |
2 to 3 |
Select PMIC_ON_REQ level:
|
J15 |
2 to 3 |
Select SD_VSEL level:
|
J17 |
CLOSED | Connects the green LED driver (U8) to PSYS voltage |
J19 |
2 to 3 |
Select PMIC_STBY_REQ level:
|
J20 |
2 to 3 |
Select LSW_EN level:
|
J21 |
1 to 2 |
Select load-switch input voltage:
|
J27 |
CLOSED | Connects the external LDO (U2) to PSYS voltage |
J56 |
1 to 2 |
Select an SCL connection:
|
J57 |
1 to 2 |
Select an SDA connection:
|
J58 |
2 to 3 |
Select if PMIC_ON_REQ connection:
|
J59 |
2 to 3 |
Select if PMIC_STBY_REQ connection:
|
J60 |
2 to 3 |
Select if WDOG_B connection:
|
J61 |
2 to 3 |
Select if IRQ_B connection:
|
J62 |
2 to 3 |
Select if POR_B connection:
|
J63 |
2 to 3 |
Select if LSW_EN connection:
|
J70 |
2 to 3 |
Select if SD_VSEL connection:
|
J71 |
CLOSED | Connects PMIC_RET_B to the reset button (SW3) |
J72 |
2 to 3 |
Select WDOG_B (watchdog reset input) signal:
|
J73 |
OPEN | Jumper for internal validation only |
J74 |
2 to 3 |
Select if PMIC_RST_B connection:
|
J75 |
CLOSED | Connects LDO1 input voltage (INL1) to PSYS |
J76 |
CLOSED | Connects LDO2 input voltage (INL2) to PSYS |
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Figure 3 presents a typical hardware configuration incorporating the development board, power supply and Windows PC workstation.
Refer to Figure 3 and follow the next steps to test the PF9453 QFN – EVB. Make sure that all jumpers are in the default positions before starting. (See section Section 2.2) and no other cables are connected to the PF9453 QFN – EVB:
J14
to position J14
(1 to 2), refer to Figure 3, circle with number 3 (this turns on the PMIC by setting the high state the PMIC_ON_REQ pin)Follow the next steps to start testing the PF9453 QFN – EVB with an external power supply. Before starting make sure that all jumpers are in the default position. (See section Section 2.2) and no other cables are connected to the PF9453 QFN – EVB:
J2
jumper to position J2
(2 to 3). Input PMIC voltage from an external power supply, see Figure 4. Step 1 is represented with the circle with number 1J45
connector: positive terminal to J45
(pin 2), negative terminal J45
(pin 1) see Figure 4, circle with number 2. The external power supply can also be connected to the following tests points: positive terminal to TP1 (VPWR) and negative terminal to TP3 (GND)J14
Jumper to position J14
(1 to 2), see Figure 4, circle with number 6. (This turns on the PMIC by setting the high state the PMIC_ON_REQ pin)Something went wrong! Please try again.
In addition to our PF9453 product page, you may also want to visit: