Low Power HDMI/DVI Level Shifter with Active DDC Buffer, Supporting 3 Gbit/s Operation

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Product Details

Block Diagram

PTN3366 Block Diagram

PTN3366 Block Diagram


  • High-speed TMDS level shifting

    • Converts four lanes of low-swing AC-coupled differential input signals to DVI v1.0 and HDMI v1.4b compliant open-drain current-steering differential output signals
    • TMDS level shifting operation up to 3 Gbit/s per lane (300 MHz TMDS clock) supporting 4K × 2K 3 Gbit/s and 3D video formats
    • Programmable receive equalization
    • Integrated 50 Ω termination resistors for self-biasing differential inputs
    • Back-current safe outputs to disallow current when device power is off and monitor is on
    • Disable feature to turn off TMDS inputs and outputs and to enter low-power condition
    • Selectable differential output termination on TMDS channels

  • DDC level shifting

    • Integrated DDC buffering and level shifting (3.3 V source to 5 V sink side and vice versa)
    • Rise time accelerator on connector side DDC ports
    • Up to 400 kHz I²C-bus clock frequency
    • Back-power safe sink-side terminals to disallow backdrive current when power is off or when DDC is not enabled

  • HPD level shifting

    • HPD non-inverting level shift from 0 V on the sink side to 0 V on the source side, or from 5 V on the sink side to 3.3 V on the source side
    • Integrated 200 kΩ pull-down resistor on HPD sink input guarantees ‘input LOW’ when no display is plugged in
    • Back-power safe design on HPD_SINK to disallow backdrive current when power is off

  • General

    • Power supply 3.3 V
    • ESD resilience to 8 kV HBM, 1 kV CDM
    • Power-saving modes
    • Back-current-safe design on all sink-side main link, DDC and HPD terminals
    • Transparent operation: no retiming or software configuration required
    • 32-terminal HVQFN32 package

Target Applications

  • PC motherboard/graphics card
  • Docking station

Part numbers include: PTN3366BS.


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