4-Bit Fm+ I²C-Bus Low-Power LED Driver

Product Details

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Block Diagram

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PCA9632 BLOCK DIAGRAM

PCA9632 BLOCK DIAGRAM

Block diagram: PCA9632DP1, PCA9632DP2, PCA9632TK, PCA9632TK2

Features

  • 40× power reduction compared to PCA9633
  • 4 LED drivers. Each output programmable at:
    • Off
    • On
    • Programmable LED brightness
    • Programmable group dimming/blinking mixed with individual LED brightness
  • 1 MHz Fast-mode Plus I²C-bus interface with 30 mA high drive capability on SDA output for driving high capacitive buses
  • 256-step (8-bit) linear programmable brightness per LED output varying from fully off (default) to maximum brightness using a 1.5625 kHz PWM signal in Individual brightness mode
  • 64-step (6-bit) linear programmable brightness for each LED output varying from fully off (default) to maximum brightness using a 6.25 kHz PWM signal in-group dimming mode
  • In group dimming mode, 16-step group brightness control allows global dimming (using a 190 Hz PWM signal) from fully off to maximum brightness (default)
  • 256-step (8-bit) linear programmable brightness per LED output varying from fully off (default) to maximum brightness using a 1.5625 kHz PWM signal in-group blinking mode
  • 64-step group blinking with frequency programmable from 24 Hz to 6 Hz and duty cycle from 0 % to 98.4 %
  • 256-step group blinking with frequency programmable from 6 Hz to 0.09 Hz (10.73s) and duty cycle from 0 % to 99.6 %
  • Four totem pole outputs (sink 25 mA and source 10 mA at 5 V) with software programmable open-drain LED outputs selection (default at high-impedance). No input function
  • 10-pin package option provides two hardware address pins allowing four devices to operate on the same bus
  • Output state change programmable on the Acknowledge or the STOP Command to update outputs byte-by-byte or all at the same time (default to ‘Change on STOP’)
  • Software Reset feature (SWRST Call) allows the device to be reset through the I²C-bus
  • 400 kHz internal oscillator requires no external components
  • Internal power-on reset
  • Noise filter on SDA/SCL inputs
  • Edge rate control on outputs
  • No glitch on power-up
  • Supports hot insertion
  • Low standby current of < 1 μA
  • Operating power supply voltage range of 2.3 V to 5.5 V
  • 5.5 V tolerant inputs
  • -40 °C to +85 °C operation
  • ESD protection exceeds 5000 V HBM per JESD22-A114 and 1000 V CDM per JESD22-C101
  • Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
  • Packages offered: TSSOP8, TSSOP10, HVSON8, HVSON10

Design Resources

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Design Files

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Hardware

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