2-1 I²C-Bus Controller Selector with Interrupt Logic and Reset

PCA9541A

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Block Diagram

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PCA9541A Block Diagram

PCA9541A Block Diagram

Block diagram: PCA9541ABS, PCA9541AD, PCA9541APW

Features

  • 2-to-1 bidirectional controller selector
  • I²C-bus interface logic; compatible with SMBus standards
  • PCA9541A/01 powers up with Channel 0 selected
  • PCA9541A/03 powers up with no channel selected and either controller can take control of the bus
  • Active LOW interrupt input
  • 2 active LOW interrupt outputs
  • Active LOW reset input
  • 4 address pins allowing up to 16 devices on the I²C-bus
  • Channel selection via I²C-bus
  • Bus initialization/recovery function
  • Bus traffic sensor
  • Low Ron switches
  • Allows voltage level translation between 1.8 V, 2.5 V, 3.3 V and 5 V buses
  • No glitch on power-up
  • Supports hot insertion
  • Software identical for both controllers
  • Low standby current
  • Operating power supply voltage range of 2.3 V to 5.5 V
  • 6.0 V tolerant inputs
  • 0 Hz to 400 kHz clock frequency
  • ESD protection exceeds 2000 V HBM per JESD22-A114 and 1000 V CDM per JESD22-C101
  • Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
  • Packages offered: SO16, TSSOP16, HVQFN16

Target Applications

  • High reliability systems with dual controllers
  • Gatekeeper multiplexer on long single bus
  • Bus initialization/recovery for target devices without hardware reset
  • Allows controllers without arbitration logic to share resources

Documentation

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Hardware

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