Eight-Channel I²C-Bus Multiplexer with Reset

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Block Diagram

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PCA9547 Block Diagram

PCA9547 Block Diagram

Block diagram: PCA9547BS, PCA9547D, PCA9547PW

Block diagram: PCA9547BS, PCA9547D, PCA9547PW

Features

Key Features

  • 1-of-8 bidirectional translating multiplexer
  • I²C-bus interface logic; compatible with SMBus standards
  • Active LOW RESET input
  • 3 address pins allowing up to 8 devices on the I²C-bus
  • Channel selection via I²C-bus, one channel at a time
  • Power-up with all channels deselected except Channel 0 which is connected
  • Low Ron multiplexers
  • Allows voltage level translation between 1.8 V, 2.5 V, 3.3 V and 5 V buses
  • No glitch on power-up
  • Supports hot insertion
  • Low standby current
  • Operating power supply voltage range of 2.3 V to 5.5 V
  • 5 V tolerant inputs
  • 0 Hz to 400 kHz clock frequency
  • ESD protection exceeds 2000 V HBM per JESD22-A114 and 1000 V CDM per JESD22-C101
  • Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA

Packages Offered

  • SO24, TSSOP24, HVQFN24

Product Longevity Program

  • This product is included in NXP Product Longevity Program ensuring a stable supply of products for your embedded designs. The PCA9547PW is included in the 15-year program

Part numbers include: PCA9547BS, PCA9547D, PCA9547PW.

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Hardware

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