MM912_634: Integrated HCS12 Based Relay Driver Microcontrollers (MCUs) with LIN
Overview
Features
Features
CPU Core
- 16-Bit S12 CPU, 64/48/32 kByte Program Flash
- 4/2/0 kByte Data Flash
- 6/2/2 kBytes of RAM
- Background debug (BDM) & debug module (DBG)
- 16-Bit, 4 Channel - Timer Module (TIM16B4C)
- Die to Die bus interface for transparent memory mapping
Standard I/O
- 6 or 10 digital MCU GPIOs shared with SPI
- 10-Bit, 15 Channel - Analog to Digital Converter (ADC)
- 8-Bit, 2 Channel - Pulse width modulation module (PWM)
Application Specific Functions
- On-chip oscillator & two independent watchdogs
- LIN 2.1 Physical Layer Interface with integrated SCI
- Six high voltage / Wake-up inputs (L5…0)
- Three low voltage GPIOs (PB2…0)
- Low power modes with cyclic sense & forced wake-up
- Two protected low side outputs to drive inductive loads
- Two protected high side outputs
- Hall sensor supply & integrated voltage regulator(s)
- Reverse battery protected voltage sense module
- Chip temperature sensor
- Current sense module with selectable gain
Product Longevity
- The MM912F634 is included in NXP®.s product longevity program, with assured supply for a minimum of 15 years after launch
.