S12XHY Scalable Cluster Microcontrollers (MCUs) with CAN

Block Diagram

S12XHY Microcontroller Block Diagram

S12XHY Microcontroller Block Diagram


  • CPU12XV1 CPU core, with up to 40 MHz bus frequency
  • Up to 256 KB on-chip flash with ECC and 8 KB data flash with ECC
  • Up to 12 KB on-chip SRAM
  • Up to 40 x 4 LCD driver
  • Stepper motor controller with up to four drivers, plus four stepper stall detector modules (one for each motor)
  • Phase-locked loop (PLL) frequency multiplier with internal filter supporting 4–16 MHz amplitude controlled Pierce oscillator
  • Pulse width modulation (PWM) and two timer modules (TIM0 and TIM1)
  • Up to 12-channel, 10-bit resolution successive approximation analog-to-digital converter (ADC)
  • Serial peripheral interface (SPI) module and inter-IC bus interface (IIC) module
  • Two serial communication interface (SCI) modules supporting LIN communications
  • Two multi-scalable controller area network (MSCAN) modules (supporting CAN protocol 2.0A/B)
  • On-chip voltage regulator (Vreg) for regulation of input supply and all internal voltages
  • Autonomous periodic interrupt (API) and up to 25 key wake-up inputs
  • This product is included in NXP product longevity program, with assured supply for a minimum of 15 years after launch

Part numbers include: S912XHY128F0CLL, S912XHY128F0CLM, S912XHY128F0VLL, S912XHY128F0VLM, S912XHY256F0CLL, S912XHY256F0CLM, S912XHY256F0MLL, S912XHY256F0MLM, S912XHY256F0VLL, S912XHY256F0VLM.


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Note: For better experience, software downloads are recommended on desktop.

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