PurpleBox Reference Design for Distributed Radar Architectures

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Block Diagram

PurpleBox Distributed Radar Processing Platform Block Diagram

PURPLEBOX-BD

Supported Devices

Processors and Microcontrollers

S32R Radar Processing

Interfaces

Automotive Ethernet PHYs

Automotive Ethernet Switches

CAN Signal Improvement

Power Management

System Basis Chips

PMICs

RF

Radar Transceivers and SoCs

Features

Processing Power

  • Aggregation and central processing of four corner radar sensors at once
  • Produces a high-density surrounding point cloud
  • Optional AI acceleration up to 26 tera-operations per second (TOPS) enabling enhanced point clouds
  • Optional NVMe storage facilities for data gathering and playback
  • Full example Radar processing chain:
    • Range, Doppler
    • DDMA
    • Coherent/non-coherent combining
    • OS CFAR
    • Accelerated DoA algorithms such as iterative adaptive approach (IAA)
  • ISO 26262 support by using safety components and architecture

Software Development Environment

  • NXP radar software development kit

Documentation

Quick reference to our documentation types.

2 documents

Design Resources

Software

2 software files

  • Software Development Resources

    PurpleBox Linux BSPnew

  • Software Development Resources

    PurpleBox Radar Bridge Demo Applicationnew

Note: For better experience, software downloads are recommended on desktop.

Support

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