Evaluation/Demonstration Board for PTN3460/3460I


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Product Details

Supported Devices

Analog and Mixed Signal




  • Embedded microcontroller and on-chip Non-Volatile Memory (NVM) allow for easy firmware updates

Power Management

  • LVDS panel power-up (/down) sequencing control
  • FW controlled panel power-up/down sequence timing parameters
  • High-performance Auto Receive Equalization enabling optimal channel compensation, device placement flexibility, and power saving at CPU/GPU


  • EDID ROM emulation to support panels with no EDID ROM

Key Features

  • eDP compiling PWM signal generation or PWM signal pass through from eDP source
  • Compliant to DP v1.2a and v1.1a
  • Compliant to eDP v1.2 and v1.1
  • Supports eDP authentication options: Alternate Scrambler Seed Reset (ASSR) and Alternate Framing
  • Supports DisplayPort symbol error rate measurements
  • Supports RGB data packing as per JEIDA and VESA data formats
  • Supports pixel clock frequency from 25 MHz to 112 MHz
  • Supports Main Link operation with one or two lanes
  • Supports Main Link rate: Reduced Bit Rate (1.62 Gbit/s) and High Bit Rate (2.7 Gbit/s)
  • Supports 1 Mbit/s AUX channel
  • Supports down spreading to minimize EMI
  • Programmable AUX P/N swap and DP Main Link P/N swap
  • Configurable CFG3 for to DP one or two lanes selection
  • Configurable CFG4 for EDID ROM emulation ON/OFF selection
  • Industrial temperature range 40 °C to 85 °C

Buy Options


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  • $806.25 USD
  • For a quantity of 1
    • Availability: In stock
    • Inventory: 2
    • Shipping: Normally ships 1-2 business days
Buy from NXPBuy From Distributor

Click to expand

  • $806.25 USD
  • For a quantity of 1
Buy From Distributor


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Design Resources

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