CBTL01023GM: 3.3 V, one differential channel, 2 : 1 multiplexer/demultiplexer switch for PCI Express Gen3

Overview

CBTL01023 is a single differential channel, 2-to-1 multiplexer/demultiplexer switch for PCI Express Generation 3 (Gen3), or other high-speed serial interface applications. The CBTL01023 can switch one differential signal to one of two locations. Using a design technique, NXP^® has minimized the impedance of the switch such that the attenuation observed through the switch is negligible, and also minimized the channel-to-channel crosstalk, as required by the high-speed serial interface. CBTL01023 allows expansion of existing high speed ports for extremely low power.

Features

Single bidirectional differential channel, 2 : 1 multiplexer/demultiplexer
High-speed signal switching for PCIe Gen3 8 Gbit/s
High bandwidth: 9 GHz at -3 dB
Low insertion loss:
- -0.6 dB at 100 MHz
- -1.5 dB at 4.0 GHz
Low off-state isolation: -30 dB at 4 GHz
Low intra-pair skew: 5 ps typical
V_DD operating range: 3.3 V ±10 %
Shutdown pin (XSD) for power-saving mode
- Standby current less than 1 μA
ESD tolerance:
- 2000 V HBM
- 1000 V CDM
XQFN10 package

Target Applications

Routing of high-speed differential signals with low signal attenuation
- PCIe Gen3
- DisplayPort 1.2
- USB 3.0
- SATA 6 Gbit/s

Features

Single bidirectional differential channel, 2 : 1 multiplexer/demultiplexer
High-speed signal switching for PCIe Gen3 8 Gbit/s
High bandwidth: 9 GHz at -3 dB
Low insertion loss:
- -0.6 dB at 100 MHz
- -1.5 dB at 4.0 GHz
Low off-state isolation: -30 dB at 4 GHz
Low intra-pair skew: 5 ps typical
V_DD operating range: 3.3 V ±10 %
Shutdown pin (XSD) for power-saving mode
- Standby current less than 1 μA
ESD tolerance:
- 2000 V HBM
- 1000 V CDM
XQFN10 package

Target Applications

Routing of high-speed differential signals with low signal attenuation
- PCIe Gen3
- DisplayPort 1.2
- USB 3.0
- SATA 6 Gbit/s

CBTL01023 Block Diagram

sot1049-3_3d

CBTL01023 Block Diagram
sot1049-3_3d

CBTL01023 Block Diagram

sot1049-3_3d

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